/*
This file is a part of 
TRAJA(Tokai Research Approarch for JavaVM Architecture) project.

Copyright 1997, 1998 Shimizu-Lab., School of Engineering, Tokai University.
		1117 Kitakaname, Hiratsuka, Kanagawa, 259-1292, Japan
		email: nshimizu@et.u-tokai.ac.jp
		URL:   http://shimizu-lab.et.u-tokai.ac.jp/

Though these files are RTL hardware source code,
the copying policy just follow the GPL 2.0(see COPYING file).
If you have any comment or improvement for these files, feel free
to contact to me.

*/
/***********************************/
/*    4bit decoder for Java-chip   */
/***********************************/

module decode4 {
   instrin     do;
   input       a<4>;
   output      out<16>;
   
  
   
   instruct do par {
	out = ( a==0x0 )
	|| ( a==0x1 )
	|| ( a==0x2 )
	|| ( a==0x3 )
	|| ( a==0x4 )
	|| ( a==0x5 )
	|| ( a==0x6 )
	|| ( a==0x7 )
	|| ( a==0x8 )
	|| ( a==0x9 )
	|| ( a==0xa )
	|| ( a==0xb )
	|| ( a==0xc )
	|| ( a==0xd )
	|| ( a==0xe )
	|| ( a==0xf );
   }
}