TRAJA PROJECT HOME PAGE
I would like to announce that the Java processor TRAJA2
is now put under the GPL.
The source code was almost written with an undergraduate student,
and there is only a Japanese document except for the sources.
(I need volunteer to translate the document in English)
The code is written with SFL, and synthsizable with PARTHENON.
Current version only implements integer instructions, and complex
instructions are remain for emulation. (Sorry no emulation code
is completed yet.)
If compiled with ALTERA library, it will need 9901 logic cell
for FLEX10K architecture. I don't have fitter for large CPLD,
but I expect that TRAJA2 will fit in an EPF10K250.
I would like to start OpenTRAJA project based on the TRAJA2 to
enhance the TRAJA2 and build a Java workstation with a Java
There are so many tasks to be done, of course.
Tokai Research Approach for JavaVM Architecture(TRAJA) V2.0
(The V2.0 is the 1996 undergraduate thesis at Shimizu-lab.)
(C)Copyright by Shimizu-lab, 1996,1997,1998.
Dr. Naohiko Shimizu
School of Engineering, Tokai University
1117 Kitakaname, Hiratsuka-city, Kanagawa, 259-1292, Japan
email: nshimizu @ keyaki . cc.u-tokai.ac.jp
The above URL is the primary distribution site for TRAJA.
You can synthesize this processor with PARTHENON.
See the URL:
for more information about PARTHENON.
You also can down-load the Linux or FreeBSD or SUN version of
PARTHENON from the URL:
*CAUTION*: Linux users may have to patch your kernel to synthesize
larger SFL file because standard Linux kernel does not allow
users to extend stack size any more than 8MB ;-p.
Apply the linux.patch in this directory to patch your
COPYING ; GPL
linux.patch ; kernel patch file for Linux
traja2.pdf ; The thesis paper(Japanese PDF file)
javachip.sfl ; processor main file
javaalu.sfl ; 64bit alu
shift64.sfl ; 64bit shifter
decode4.sfl ; decoder
decode8.sfl ; decoder
irshift.sfl ; instruction shifter
opl.sfl ; opcode length detector
board.sfl ; simulation base package
fp_adder.sfl ; not used yet
bit_h.sfl ; not used yet
fp_multi.sfl ; not used yet
- pl.jpg ; The pipeline stage
- if.jpg ; The Block diagram of IF stage
- id.jpg ; The Block diagram of ID stage
- oc.jpg ; The Block diagram of OC stage
- ex.jpg ; The Block diagram of EX stage
- sc.jpg ; The Block diagram of SC unit
OpenTRAJA preliminary package. It is reorganizing for enhance
the readablity of the source code.
Synthesized result with DEMO library of the PARTHENON