/*
This file is a part of 
TRAJA(Tokai Research Approarch for JavaVM Architecture) project.

Copyright 1997, 1998 Shimizu-Lab., School of Engineering, Tokai University.
		1117 Kitakaname, Hiratsuka, Kanagawa, 259-1292, Japan
		email: nshimizu@et.u-tokai.ac.jp
		URL:   http://shimizu-lab.et.u-tokai.ac.jp/

Though these files are RTL hardware source code,
the copying policy just follow the GPL 2.0(see COPYING file).
If you have any comment or improvement for these files, feel free
to contact to me.

*/
/************************************************/
/*                                              */
/*              TRAJA Version 2.0               */
/*                                              */
/*   The Java Virtual Machine Instruction Set   */
/*         Compatible Processor Named           */
/* Tokai Research Approach for JVM Architecture */
/* ^     ^        ^            ^   ^            */
/*    Modified by Naohiko Shimizu (May 11,1997) */
/*    Programmed by Masaki Aoyagi (Mar 21,1997) */
/*                                              */
/************************************************/




/** Inclusion of internal modules **/

%i "decode4.sfl"
%i "decode8.sfl"
/* %i "inc.sfl"   change to use PARTHENON library code cla32 */
%i <cla32.h>
/* %i "add8.sfl"   change to use PARTHENON library code cla8 */
%i <cla8.h>
%i "opl.sfl"
%i "irshift.sfl"
%i "javaalu.sfl"
%i "shift64.sfl"

/** Declaration of internal modules **/
submod_type decode4{

	instrin  do;
	input    a<4>;
	output   out<16>;

	instr_arg	do(a);
}
submod_type decode8{

	instrin  do;
	input    a<8>;
	output   out<256>;

	instr_arg	do(a);
}



/* 32bit Adder */

/*
submod_type inc{

	instrin  do;
	input    a<32>,b<32>,ci;
	output   out<32>;

	instr_arg	do(a,b,ci);
}
*/


/* 8bit Adder */

/*
submod_type add8 {

	instrin	do;
	input	a<8>, b<8>, ci;
	output	out<8>, co, vo;

	instr_arg	do(a, b, ci);
}

*/

/* Opcode Length Finder */

submod_type opl{

	instrin	do;
	input   in<8>;
	output  out<32>;

	instr_arg	do(in);
}



/* Instruction Shifter */

submod_type irshift{

	instrin  do;
	input    in<64>,mode<2>;
	output   out<64>;

	instr_arg	do(in,mode);

}


/* 64bit ALU */

submod_type javaalu{

	instrin  do;
	input    mode<3>,a<64>,b<64>,ci;
	output   out<64>,vo,no,zo;

	instr_arg	do(mode,a,b,ci);

}

/* 64bit Shifter */

submod_type shift64 {

    input       in<64> ;
    input       x<6> ;
    output      out<64> ;

    instrin     sll ;
    instrin     srl ;
    instrin     sra ;

    instr_arg sll(in,x) ;
    instr_arg srl(in,x) ;
    instr_arg sra(in,x) ;
}



%d exorig	(exdecode<255>)

%d exnop	(exdecode<000>)

%d exaconst_null	(exdecode<001>)
%d exiconst_m1	(exdecode<002>)
%d exiconst_0	(exdecode<003>)
%d exiconst_1	(exdecode<004>)
%d exiconst_2	(exdecode<005>)
%d exiconst_3	(exdecode<006>)
%d exiconst_4	(exdecode<007>)
%d exiconst_5	(exdecode<008>)
%d exlconst_0	(exdecode<009>)
%d exlconst_1   	(exdecode<010>)
%d exfconst_0   	(exdecode<011>)
%d exfconst_1   	(exdecode<012>)
%d exfconst_2   	(exdecode<013>)
%d exdconst_0   	(exdecode<014>)
%d exdconst_1   	(exdecode<015>)

%d exbipush	(exdecode<016>)
%d exsipush	(exdecode<017>)

%d exldc1	(exdecode<018>)
%d exldc2	(exdecode<019>)
%d exldc2w	(exdecode<020>)

%d exiload	(exdecode<021>)
%d exlload	(exdecode<022>)
%d exfload	(exdecode<023>)
%d exdload	(exdecode<024>)
%d exaload	(exdecode<025>)

%d exiload_0	(exdecode<026>)
%d exiload_1	(exdecode<027>)
%d exiload_2	(exdecode<028>)
%d exiload_3	(exdecode<029>)

%d exlload_0	(exdecode<030>)
%d exlload_1	(exdecode<031>)
%d exlload_2	(exdecode<032>)
%d exlload_3	(exdecode<033>)

%d exfload_0	(exdecode<034>)
%d exfload_1	(exdecode<035>)
%d exfload_2	(exdecode<036>)
%d exfload_3	(exdecode<037>)

%d exdload_0	(exdecode<038>)
%d exdload_1	(exdecode<039>)
%d exdload_2	(exdecode<040>)
%d exdload_3	(exdecode<041>)

%d exaload_0	(exdecode<042>)
%d exaload_1	(exdecode<043>)
%d exaload_2	(exdecode<044>)
%d exaload_3	(exdecode<045>)

%d exiaload	(exdecode<046>)
%d exlaload	(exdecode<047>)
%d exfaload	(exdecode<048>)
%d exdaload	(exdecode<049>)
%d exaaload	(exdecode<050>)
%d exbaload	(exdecode<051>)
%d excaload	(exdecode<052>)
%d exsaload	(exdecode<053>)

%d existore	(exdecode<054>)
%d exlstore	(exdecode<055>)
%d exfstore	(exdecode<056>)
%d exdstore	(exdecode<057>)
%d exastore	(exdecode<058>)

%d existore_0	(exdecode<059>)
%d existore_1	(exdecode<060>)
%d existore_2	(exdecode<061>)
%d existore_3	(exdecode<062>)

%d exlstore_0	(exdecode<063>)
%d exlstore_1	(exdecode<064>)
%d exlstore_2	(exdecode<065>)
%d exlstore_3	(exdecode<066>)

%d exfstore_0	(exdecode<067>)
%d exfstore_1	(exdecode<068>)
%d exfstore_2	(exdecode<069>)
%d exfstore_3	(exdecode<070>)

%d exdstore_0	(exdecode<071>)
%d exdstore_1	(exdecode<072>)
%d exdstore_2	(exdecode<073>)
%d exdstore_3	(exdecode<074>)

%d exastore_0	(exdecode<075>)
%d exastore_1	(exdecode<076>)
%d exastore_2	(exdecode<077>)
%d exastore_3	(exdecode<078>)

%d exiastore	(exdecode<079>)
%d exlastore	(exdecode<080>)
%d exfastore	(exdecode<081>)
%d exdastore	(exdecode<082>)
%d exaastore	(exdecode<083>)
%d exbastore	(exdecode<084>)
%d excastore	(exdecode<085>)
%d exsastore	(exdecode<086>)

%d expop	(exdecode<087>)
%d expop2	(exdecode<088>)
%d exdup	(exdecode<089>)

%d exdup_x1	(exdecode<090>)
%d exdup_x2	(exdecode<091>)
%d exdup2	(exdecode<092>)
%d exdup2_x1	(exdecode<093>)
%d exdup2_x2	(exdecode<094>)
%d exswap	(exdecode<095>)

%d exiadd	(exdecode<096>)
%d exladd	(exdecode<097>)
%d exfadd	(exdecode<098>)
%d exdadd	(exdecode<099>)

%d exisub	(exdecode<100>)
%d exlsub	(exdecode<101>)
%d exfsub	(exdecode<102>)
%d exdsub	(exdecode<103>)

%d eximul	(exdecode<104>)
%d exlmul	(exdecode<105>)
%d exfmul	(exdecode<106>)
%d exdmul	(exdecode<107>)

%d exidiv	(exdecode<108>)
%d exldiv	(exdecode<109>)
%d exfdiv	(exdecode<110>)
%d exddiv	(exdecode<111>)

%d exirem	(exdecode<112>)
%d exlrem	(exdecode<113>)
%d exfrem	(exdecode<114>)
%d exdrem	(exdecode<115>)

%d exineg	(exdecode<116>)
%d exlneg	(exdecode<117>)
%d exfneg	(exdecode<118>)
%d exdneg	(exdecode<119>)

%d exishl	(exdecode<120>)
%d exlshl	(exdecode<121>)
%d exishr	(exdecode<122>)
%d exlshr	(exdecode<123>)
%d exiushr	(exdecode<124>)
%d exlushr	(exdecode<125>)

%d exiand	(exdecode<126>)
%d exland	(exdecode<127>)
%d exior	(exdecode<128>)
%d exlor	(exdecode<129>)
%d exixor	(exdecode<130>)
%d exlxor	(exdecode<131>)
%d exiinc	(exdecode<132>)
%d exi2l	(exdecode<133>)
%d exi2f	(exdecode<134>)
%d exi2d	(exdecode<135>)
%d exl2i	(exdecode<136>)
%d exl2f	(exdecode<137>)
%d exl2d	(exdecode<138>)
%d exf2i	(exdecode<139>)
%d exf2l		(exdecode<140>)
%d exf2d		(exdecode<141>)
%d exd2i		(exdecode<142>)
%d exd2l		(exdecode<143>)
%d exd2f		(exdecode<144>)
%d exint2byte		(exdecode<145>)
%d exint2char		(exdecode<146>)
%d exint2short		(exdecode<147>)
%d exlcmp 		(exdecode<148>)
%d exfcmpl 		(exdecode<149>)
%d exfcmpg 		(exdecode<150>)
%d exdcmpl 		(exdecode<151>)
%d exdcmpg 		(exdecode<152>)
%d exifeq 		(exdecode<153>)
%d exifne 		(exdecode<154>)
%d exiflt 		(exdecode<155>)
%d exifge 		(exdecode<156>)
%d exifgt 		(exdecode<157>)
%d exifle 		(exdecode<158>)
%d exif_icmpeq		(exdecode<159>)
%d exif_icmpne		(exdecode<160>)
%d exif_icmplt		(exdecode<161>)
%d exif_icmpge		(exdecode<162>)
%d exif_icmpgt		(exdecode<163>)
%d exif_icmple		(exdecode<164>)
%d exif_acmpeq		(exdecode<165>)
%d exif_acmpne		(exdecode<166>)
%d exgoto 		(exdecode<167>)
%d exjsr		(exdecode<168>)
%d exret		(exdecode<169>)
%d extableswitch 	(exdecode<170>)
%d exlookupswitch	(exdecode<171>)
%d exireturn		(exdecode<172>)
%d exlreturn		(exdecode<173>)
%d exfreturn 		(exdecode<174>)
%d exdreturn 		(exdecode<175>)
%d exareturn 		(exdecode<176>)
%d exreturn 		(exdecode<177>)
%d exgetstatic		(exdecode<178>)
%d exputstatic 		(exdecode<179>)
%d exgetfield 		(exdecode<180>)
%d exputfield 		(exdecode<181>)
%d exinvokevirtual	(exdecode<182>)
%d exinvokenonvirtual	(exdecode<183>)
%d exinvokestatic	(exdecode<184>)
%d exinvokeinterface	(exdecode<185>)
/* OPCODE 186 is not allocated */
%d exnew		(exdecode<187>)
%d exnewarray		(exdecode<188>)
%d exanewarray		(exdecode<189>)
%d exarraylength	(exdecode<190>)
%d exathrow		(exdecode<191>)
%d excheckcast		(exdecode<192>)
%d exinstanceof		(exdecode<193>)
%d exmonitorenter	(exdecode<194>)
%d exmonitorexit	(exdecode<195>)
%d exwide		(exdecode<196>)
%d exmultianewarray	(exdecode<197>)
%d exifnull		(exdecode<198>)
%d exifnonnull		(exdecode<199>)
%d exgoto_w 		(exdecode<200>)
%d exjsr_w 		(exdecode<201>)
%d exbreakpoint 	(exdecode<202>)
%d exret_w 		(exdecode<209>)

/* Original Instructions */


%d  ocifeq 	  ocdecode<153>
%d  ocifne 	  ocdecode<154>
%d  ociflt 	  ocdecode<155>
%d  ocifge 	  ocdecode<156>
%d  ocifgt 	  ocdecode<157>
%d  ocifle 	  ocdecode<158>

%d  ocif_icmpeq	  ocdecode<159>
%d  ocif_icmpne	  ocdecode<160>
%d  ocif_icmplt	  ocdecode<161>
%d  ocif_icmpge	  ocdecode<162>
%d  ocif_icmpgt	  ocdecode<163>
%d  ocif_icmple	  ocdecode<164>
%d  ocif_acmpeq	  ocdecode<165>
%d  ocif_acmpne	  ocdecode<166>

%d  ocifnull	  ocdecode<198>
%d  ocifnonnull	  ocdecode<199>

%d  ocgoto 	  ocdecode<167>
%d  ocgoto_w 	  ocdecode<200>

%d  ocjsr	   ocdecode<168>
%d  ocjsr_w 	  ocdecode<201>

%d  ociload	  ocdecode<21>
%d  oclload	  ocdecode<22>
%d  ocfload	  ocdecode<23>
%d  ocdload	  ocdecode<24>
%d  ocaload	  ocdecode<025>

%d  ociload_0	  ocdecode<026>
%d  ociload_1	  ocdecode<027>
%d  ociload_2	  ocdecode<028>
%d  ociload_3	  ocdecode<029>

%d  oclload_0	  ocdecode<030>
%d  oclload_1	  ocdecode<031>
%d  oclload_2	  ocdecode<032>
%d  oclload_3	  ocdecode<033>

%d  ocfload_0	  ocdecode<034>
%d  ocfload_1	  ocdecode<035>
%d  ocfload_2	  ocdecode<036>
%d  ocfload_3	  ocdecode<037>

%d  ocdload_0	  ocdecode<038>
%d  ocdload_1	  ocdecode<039>
%d  ocdload_2	  ocdecode<040>
%d  ocdload_3	  ocdecode<041>

%d  ocaload_0	  ocdecode<042>
%d  ocaload_1	  ocdecode<043>
%d  ocaload_2	  ocdecode<044>
%d  ocaload_3	  ocdecode<045>

%d  ocistore	  ocdecode<054>
%d  oclstore	  ocdecode<055>
%d  ocfstore	  ocdecode<056>
%d  ocdstore	  ocdecode<057>
%d  ocastore	  ocdecode<058>

%d  ocistore_0	  ocdecode<059>
%d  ocistore_1	  ocdecode<060>
%d  ocistore_2	  ocdecode<061>
%d  ocistore_3	  ocdecode<062>

%d  oclstore_0	  ocdecode<063>
%d  oclstore_1	  ocdecode<064>
%d  oclstore_2	  ocdecode<065>
%d  oclstore_3	  ocdecode<066>

%d  ocfstore_0	  ocdecode<067>
%d  ocfstore_1	  ocdecode<068>
%d  ocfstore_2	  ocdecode<069>
%d  ocfstore_3	  ocdecode<070>

%d  ocdstore_0	  ocdecode<071>
%d  ocdstore_1	  ocdecode<072>
%d  ocdstore_2	  ocdecode<073>
%d  ocdstore_3	  ocdecode<074>

%d  ocastore_0	  ocdecode<075>
%d  ocastore_1	  ocdecode<076>
%d  ocastore_2	  ocdecode<077>
%d  ocastore_3	  ocdecode<078>

%d  ocret	   ocdecode<169>
%d  ocret_w 	  ocdecode<209>

%d  ociinc	  ocdecode<132>



/************ Description of The Module Javachip V2.0 **************/

module javachip{


	/**** Declaration of Elements ****/


	/** for The Stage of Stack Cache **/

	reg_wr sp<32>,sp0<32>; /* Stack Pointer and Dummy */
	reg_wr sccount<8>; /* SC Entry Counter */
	reg_wr sc0<33>,sc1<33>,sc2<33>,sc3<33>,sc4<33>,sc5<33>,sc6<33>,sc7<33>,sc8<33>,sc9<33>;
	reg_wr sc10<33>,sc11<33>,sc12<33>,sc13<33>,sc14<33>,sc15<33>,sc16<33>,sc17<33>,sc18<33>,sc19<33>;
	reg_wr sc20<33>,sc21<33>,sc22<33>,sc23<33>,sc24<33>,sc25<33>,sc26<33>,sc27<33>,sc28<33>,sc29<33>;
	reg_wr sc30<33>,sc31<33>; /* SC Entries */

	sel scout0<32>,scout1<32>,scout2<32>,scout3<32>; /* SC Output Pins */
	sel scout0or,scout1or;
/*	sel scin0<32>,scin1<32>; */ /* SC Input Pins */
/*	sel scinst<7>; *//* SC Control Instruction Pin -> ( Mode<2> || Num. Output<3> || Num. Input<2> ) */
	sel scma; /*SC Memory Access Flag */
	sel scv; /* SC Valid Flag */
	sel scch_sp;
	sel sctmp1,sctmp2,sctmp3,sctmp4;

	cla32 spinc; /* Incrementor for sp and sp0 */
	cla8  scinc; /* Incrementor for sccount */
	decode8 exdec,ocdec;
	decode4 exop1dec4,exop2dec4;


	/** for Instruction Fetch Stage **/

	reg_wr pcif<32>; /* pc for IF Stage */
	reg_wr idata0<33>,idata1<33>,idata2<33>,idata3<33>; /* 32bit Instruction Data with Valid Bit */

	sel pcifnext<32>; /* Temp. Next pcif */
	sel idata<33>; /* Temp. Write Data */

	cla32 incif;/* incrementor for pcif */


	/** for Instruction Decode Stage **/

	reg_wr pc<32>; /* Program Counter */
	reg_wr exdata0<73>,exdata1<73>,exdata2<73>,exdata3<73>; /* Execution Data Buffer Entries */
	reg_wr wcounter<2>;/* EX Data Buffer Write Counter */

	sel ifdv,exbf; /* Flags of IF Data Valid and EX Buffer Free */
	sel ifd<64>; /* Shifted Instruction data */
	sel length<32>; /* Instruction Length to Add to pc */
	sel exdata<73>; /* Tmp. EX Bufer Data */
	sel rls<2>; /* Num. Release. 01->release 1 entry, 10->release 2 entries, 00->nothing to do */
	sel pcnext<32>; /* Temp. Next pc */

	cla32 pcinc;/* Incrementor for pc */
	opl oplength; /* Instruction Length Finder */
	irshift irsft; /* Instruction Data Shifter */


	/** for Operand Creation Stage **/

	reg_wr excounter<2>; /* Execution Counter */

	sel ocdata<73>; /* Operation Data Fetched from EX Data Buffer */
	sel exv; /* EX Buffer Valid Frag */
	sel ocoperand2<32>; /* Temp. 2nd Operand */

	cla32 opinc; /* Incrementor for ocoperand2 */


	/** for EXecution Stage **/

	reg_wr expt<32>; /* Exceptional Branch Address */
	reg_wr vars<32>; /* VARS Register for JVM */
	reg_wr r0<32>,r1<32>; /* Resisters for Execution */
	/* reg_wr r2<32>,r3<32>; */
	reg_wr exop<8>,exoperand<32>,exoperand2<32>,expc<32>; /* Divided EX Data */

	sel dma; /* EX Stage Memory Access Frag */
	sel branch; /* Branch Frag */
	sel newpc_tmp<32>; /*  Temp. New PC */
	sel exrls; /* 0b1->Demand Next Operation */
   	sel t64<64>; /* 64bit Terminal */

	javaalu alu; /* 64bit Integer ALU */
	shift64 shifter; /* 64bit Shifter */
	opl exopl; /* Instruction Length Finder of Exception */

	/*** tmp setting for systhesis ***/
/** OP-CODE ID of OC Stage **/


/** OP-CODE ID of EX Stage **/
sel exdecode<256>;
sel exorgop1<16>;
sel exorgop2<16>;
sel ocdecode<256>;

sel exxr0r1<32>;
sel exeqr0r1;
sel exundef;
sel exch_sp	;
sel exch_vars	;
sel exch_expt 	;

sel exload 	;
sel exload_w 	;
sel exstore 	;
sel exstore_w 	;

sel expush_pc 	;
sel expush_sp 	;
sel expush_vars 	;
sel expush_expt 	;

sel exjump 	;
sel exjump_sr 	;

sel exnload 	;
sel exnstore 	;
sel exnldst 	;

sel exload_0,exload_1,exload_2,exload_3;
sel		op1<64>,op2<64>,opc<3>;


	/**** for General ****/

	/* EX Stage Stall Instruction */
	instrself exstall,exnormex,exdmaex,exdmanx,exjmp,exbranch;
instrself doexnop ,doexpop ,doexpop2 ,doexdup ,doexdup2 ,doexdup_x1 
,doexdup2_x1 ,doexdup_x2 ,doexdup2_x2 ,doexswap ,doexifeq ,doexiflt 
,doexifle ,doexifne ,doexifgt 
,doexifge ,doexif_icmpeq ,doexif_icmpne ,doexif_icmplt ,doexif_icmpgt 
,doexif_icmple ,doexif_icmpge ,doexlcmp ,doexgoto ,doexjsr ,doexjsr_w 
,doexret ,doexbipush ,doexsipush ,doexiconst_m1  ,doexiconst_0 ,doexiconst_1 
,doexiconst_2 ,doexiconst_3 ,doexiconst_4 ,doexiconst_5 ,doexlconst_0 
,doexlconst_1 ,doexfconst_1 ,doexfconst_2 ,doexdconst_1 ,doexiload 
,doexlload ,doexistore ,doexlstore ,doexiinc ,doexiadd 
,doexladd ,doexisub ,doexlsub ,doexineg ,doexlneg 
,doexfneg ,doexdneg ,doexishl ,doexlshl ,doexishr ,doexlshr 
,doexiushr ,doexlushr ,doexiand ,doexland ,doexior ,doexlor 
,doexixor ,doexlxor ,doexi2l ,doexl2i ,doexint2byte ,doexint2char 
,doexint2short ,doexch_sp ,doexch_vars ,doexch_expt ,doexload 
,doexload_w ,doexstore ,doexstore_w ,doexpush_pc ,doexpush_sp 
,doexpush_vars ,doexpush_expt ,doexjump ,doexjump_sr 
,doexnload , doexexcpt;

	/* SC Up/Down Instructions */
	instrself scu1,scu2,scu3,scu4,scd1,scd2,scd3,scd4,setsc0t64,setsc01t64; 
	instrself sco0i1, sco0i2, sco1i0, sco1i1, sco1i2, sco2i0, sco2i1;
	instrself sco3i0, sco3i1, sco3i2, sco4i0, sco4i1, sco4i2, scpop, scpop2, scdup;
	instrself scdup2, scdup_x1, scdup2_x1, scdup_x2, scdup2_x2, scswap;
	instrself	do_alu;
	instrself	sel_op1_0,sel_op1_exoperand2,sel_op1_expc,
			sel_op1_r0,sel_op1_r1,sel_op1_scout0,sel_op1_scout1,
			sel_op1_scout10,sel_op1_scout32;
	instrself 	sel_op2_bt, sel_op2_2, sel_op2_3, sel_op2_4,
			sel_op2_5, sel_op2_exop, sel_op2_r0, sel_op2_scout0,
			sel_op2_scout1, sel_op2_sc01, sel_op2_sc32;

	/** External Pins **/

	instrin		start; /* The Instruction Pin to Start Javachip */

	/* Main Memory */

	input		dbi<32>; /* Data Bus for Input */
	instrout  	mem_we,mem_re; /* Data Write/Read Instructions */
	output 		dbo<32>; /* Data Bus for Output */
	output 		ab<32>; /* Address Bus */

	/* Cache Memory

	input		icdbi<64>;
	instrout  	ic_we,ic_re;
	output 		icdbo<64>,icab_r<32>,icab_w<32>; */


	/** Memory Access Instructions **/

	/* Main Memory */

	instr_arg	mem_re(ab);
	instr_arg	mem_we(ab,dbo);

	/* Cache Memory

	instr_arg	ic_re(icab_r);
	instr_arg	ic_we(icab_w,icdbo); */

/*	ALU control	*/
	instr_arg	do_alu(opc);


	/** Definition of The Stage Nand Task name **/

	stage_name	stack{ task sct(); }
	stage_name	if{ task ift(); }
	stage_name	id{ task idt(); }
	stage_name	oc{ task oct(); }
	stage_name	ex{ task ext(); }

	/** common operations **/

par {
  ocdecode = ocdec.do(ocdata<71:64>).out;
  scout0or = /|scout0;
  scout1or = /|scout1;

/** OP-CODE ID of EX Stage **/
  exxr0r1	= r0@r1;
  exeqr0r1	= /|exxr0r1;
  exundef	= exdecode<186> | exdecode<250> | exdecode<251> | exdecode<252>
  		| exdecode<210> | exdecode<220> | exdecode<230> | exdecode<240>
  		| exdecode<211> | exdecode<221> | exdecode<231> | exdecode<241>
  		| exdecode<212> | exdecode<222> | exdecode<232> | exdecode<242>
  		| exdecode<213> | exdecode<223> | exdecode<233> | exdecode<243>
  		| exdecode<214> | exdecode<224> | exdecode<234> | exdecode<244>
  		| exdecode<215> | exdecode<225> | exdecode<235> | exdecode<245>
  		| exdecode<216> | exdecode<226> | exdecode<236> | exdecode<246>
  		| exdecode<217> | exdecode<227> | exdecode<237> | exdecode<247>
  		| exdecode<218> | exdecode<228> | exdecode<238> | exdecode<248>
  		| exdecode<219> | exdecode<229> | exdecode<239> | exdecode<249>
  		| exdecode<253> | exdecode<254> ;
exch_sp = (exorgop1<0> & exorgop2<1> & exorig);
exch_vars = (exorgop1<0> & exorgop2<2> & exorig);
exch_expt  = (exorgop1<0> & exorgop2<3> & exorig);

exload  = (exorgop1<1> & exorgop2<0> & exorig);
exload_w  = (exorgop1<1> & exorgop2<1> & exorig);
exstore  = (exorgop1<1> & exorgop2<2> & exorig);
exstore_w  = (exorgop1<1> & exorgop2<3> & exorig);

expush_pc  = (exorgop1<2> & exorgop2<0> & exorig);
expush_sp  = (exorgop1<2> & exorgop2<1> & exorig);
expush_vars  = (exorgop1<2> & exorgop2<2> & exorig);
expush_expt  = (exorgop1<2> & exorgop2<3> & exorig);

exjump  = (exorgop1<3> & exorgop2<0> & exorig);
exjump_sr  = (exorgop1<3> & exorgop2<1> & exorig);

exnload  = (exorgop1<4> & exorgop2<0> & exorig);
exnstore  = (exorgop1<4> & exorgop2<1> & exorig );
exnldst = exnload | exnstore;

exload_0 =exiload | exfload | exaload | exiload_0 | exfload_0 | 
	exaload_0 | exiload_1 | exfload_1 | exaload_1 | exiload_2 | 
	exfload_2 | exaload_2 | exiload_3 | exfload_3 | exaload_3 ;

				/* (l,d)load[_n] (1/2) */
exload_1 = exlload | exdload | exlload_0 | exdload_0 | exlload_1 | 
	exdload_1 | exlload_2 | exdload_2 | exlload_3 | exdload_3 ;


				/** Storing Stack Value into Local Variables */

exload_2 = existore | exfstore | exastore | existore_0 | exfstore_0 | 
	exastore_0 | existore_1 | exfstore_1 | exastore_1 | existore_2 | 
	exfstore_2 | exastore_2 | existore_3 | exfstore_3 | exastore_3 ;

				/* (l,d)store[_n] (1/2) */
exload_3 = exlstore | exdstore | exlstore_0 | exdstore_0 | exlstore_1 | 
	exdstore_1 | exlstore_2 | exdstore_2 | exlstore_3 | exdstore_3 ;
}

	/** Declaration of Instruction Pins **/

	instruct start par{
		generate stack.sct();
		generate if.ift();
		generate id.idt();
		generate oc.oct();
		generate ex.ext();
	}

	instruct exstall par{
		branch=0b0;
		dma=0b0;
		newpc_tmp=32#0b0;
		exrls=0b0;
	}
	instruct do_alu	t64=alu.do(opc,op1,op2,0b0).out;
	instruct sel_op1_0  op1=64#0b0;
	instruct sel_op1_exoperand2  op1=64#exoperand2;
	instruct sel_op1_expc  op1=64#expc;
	instruct sel_op1_r0  op1=64#r0;
	instruct sel_op1_r1  op1=64#r1;
	instruct sel_op1_scout0  op1=64#scout0;
	instruct sel_op1_scout1  op1=64#scout1;
	instruct sel_op1_scout10  op1=scout1||scout0;
	instruct sel_op1_scout32  op1=scout3||scout2;
	instruct sel_op2_bt	op2=30#0b0 || scout1 || 2#0b00;
	instruct sel_op2_2	op2=64#0b0010;
	instruct sel_op2_3	op2=64#0b0011;
	instruct sel_op2_4	op2=64#0b0100;
	instruct sel_op2_5	op2=64#0b0101;
	instruct sel_op2_exop	op2=64#exoperand<31:24>;
	instruct sel_op2_r0	op2=64#r0;
	instruct sel_op2_scout0	op2=64#scout0;
	instruct sel_op2_scout1	op2=64#scout1;
	instruct sel_op2_sc01	op2=scout1||scout0;
	instruct sel_op2_sc32	op2=scout3||scout2;



	instruct exnormex par {
		branch=0b0;
		dma=0b0;
		exrls=0b1;
	}

	instruct exdmaex par {
		branch=0b0;
		dma=0b1;
		exrls=0b1;
	}

	instruct exdmanx par {
		branch=0b0;
		dma=0b1;
		exrls=0b0;
	}

	instruct exjmp par {
		branch=0b1;
		dma=0b0;
		exrls=0b1;
	}
	instruct exbranch par {
		dma=0b0;
		exrls=0b1;
		newpc_tmp=exoperand2;
	}
/** Stack Instructions **/
instruct	setsc0t64 sc0:=0b1 || t64<31:0>;
instruct	setsc01t64 par{ sc0:=0b1 || t64<31:0>;sc1:=0b1 || t64<63:32>;}

/* nop */
instruct	doexnop exnormex();

/* pop */
instruct	doexpop 
	 par{
		scpop();
		exnormex();
	}

/* pop2 */
instruct	doexpop2 
	 par{
		scpop2();
		exnormex();
	}

/* dup */
instruct	doexdup 
	 par{
		scdup();
		exnormex();
	}

/* dup2 */
instruct	doexdup2 
	 par{
		scdup2();
		exnormex();
	}

/* dup_x1 */
instruct	doexdup_x1 
	 par{
		scdup_x1();
		exnormex();
	}

/* dup2_x1 */
instruct	doexdup2_x1 
	 par{
		scdup2_x1();
		exnormex();
	}

/* dup_x2 */
instruct	doexdup_x2 
	 par{
		scdup_x2();
		exnormex();
	}

/* dup2_x2 */
instruct	doexdup2_x2 
	 par{
		scdup2_x2();
		exnormex();
	}

/* swap */
instruct	doexswap 
	 par{
		scswap();
		exnormex();
	}


/** Control Transfer Instructions **/

/* ifeq & ifnull */
instruct	doexifeq 
	 par{
		sco1i0();
		exbranch();
		any {
			^(scout0or) : branch=0b1;
			else : branch=0b0;
		}
	}

/* iflt */
instruct	doexiflt 
	 par{
		sco1i0();
		exbranch();
		any {
			scout0<31> : branch=0b1;
			else : branch=0b0;
		}
	}

/* ifle */
instruct	doexifle 
	 par{
		sco1i0();
		exbranch();
		any {
			( scout0<31> | ^(scout0or) ) : branch=0b1;
			else : branch=0b0;
		}
	}

/* ifne & ifnonnull */
instruct	doexifne 
	 par{
		sco1i0();
		exbranch();
		any {
			scout0or : branch=0b1;
			else : branch=0b0;
		}
	}

/* ifgt */
instruct	doexifgt 
	 par{
		sco1i0();
		exbranch();
		any {
			( ^scout0<31> & (scout0or) ) : branch=0b1;
			else : branch=0b0;
		}
	}

/* ifge */
instruct	doexifge 
	par{
		sco1i0();
		exbranch();
		any {
			^scout0<31> : branch=0b1;
			else : branch=0b0;
		}
	}

/* if_icmpeq  & if_acmpeq */
instruct	doexif_icmpeq 
	par{
		sco2i0();
		exbranch();
		/* t64=scout0-scout1 */
		sel_op1_scout0();
		sel_op2_scout1();
		do_alu(0b010);
		any {
			alu.zo : branch=0b1;
			else : branch=0b0;
		}
	}

/* if_icmpne & if_acmpne*/
instruct	doexif_icmpne 
	par{
		sco2i0();
		exbranch();
		/* t64=scout0-scout1 */
		sel_op1_scout0();
		sel_op2_scout1();
		do_alu(0b010);
		any {
			^alu.zo : branch=0b1;
			else : branch=0b0;
		}
	}

/* if_icmplt */
instruct	doexif_icmplt 
	par{
		sco2i0();
		exbranch();
		/* t64=scout0-scout1 */
		sel_op1_scout0();
		sel_op2_scout1();
		do_alu(0b010);
		any {
			^alu.no & ^alu.zo : branch=0b1;
			else : branch=0b0;
		}
	}

/* if_icmpgt */
instruct	doexif_icmpgt 
	par{
		sco2i0();
		exbranch();
		/* t64=scout0-scout1 */
		sel_op1_scout0();
		sel_op2_scout1();
		do_alu(0b010);
		any {
			alu.no & ^alu.zo : branch=0b1;
			else : branch=0b0;
		}
	}

/* if_icmple */
instruct	doexif_icmple 
	par{
		sco2i0();
		exbranch();
		/* t64=scout0-scout1 */
		sel_op1_scout0();
		sel_op2_scout1();
		do_alu(0b010);
		any {
			^alu.no : branch=0b1;
			else : branch=0b0;
		}
	}

/* if_icmpge */
instruct	doexif_icmpge 
	par{
		sco2i0();
		exbranch();
		/* t64=scout0-scout1 */
		sel_op1_scout0();
		sel_op2_scout1();
		do_alu(0b010);
		any {
			alu.no | alu.zo : branch=0b1;
			else : branch=0b0;
		}
	}

/* lcmp */
instruct	doexlcmp 
	par{
		sco4i1();
	exnormex();
		/* t64=(scout1||scout0)-(scout3||scout2) */
		sel_op1_scout10();
		sel_op2_sc32();
		do_alu(0b010);
		any {
			alu.no : sc0:=0b1 || 32#0b01;
			alu.zo : sc0:=0b1 || 32#0b00;
			else   : sc0:=0b1 || 32#0b11;
		}
	}

/* goto & goto_w */
instruct	doexgoto 
	par {
	exjmp();
	newpc_tmp=exoperand2;
}

/* jsr */
instruct	doexjsr 
	par{
		sco0i1();
		exjmp();
		newpc_tmp=exoperand2;
		/* t64=return address */
		sel_op1_expc();
		sel_op2_3();
		do_alu(0b011);
		setsc0t64();
	}

/* jsr_w */
instruct	doexjsr_w 
	par{
		sco0i1();
		exjmp();
		newpc_tmp=exoperand2;
		/* t64=return address */
		sel_op1_expc();
		sel_op2_5();
		do_alu(0b011);
		setsc0t64();
	}

/* ret,ret_w */
instruct	doexret 
	 par{
		branch=0b1;
		dma=0b1;
		exrls=0b1;
		newpc_tmp=mem_re(exoperand2).dbi;
	}


/** Pushing Constants onto the Stack **/

/* bipush */
instruct	doexbipush 
	par{
		sco0i1();
		exnormex();
		sc0:= 0b1 || 32#exoperand<31:24>;
	}

/* sipush */
instruct	doexsipush 
	par{
		sco0i1();
		exnormex();
		sc0:= 0b1 || 32#exoperand<31:16>;
	}

/* ldc1,2,ldc2w */

/* iconst_m1 */
instruct	doexiconst_m1 
	 par{
		sco0i1();
		exnormex();
		sc0:= 0b1 || 32#0b1;
	}

/* iconst_0 & aconst_null & fconst_0 */
instruct	doexiconst_0 
	par{
		sco0i1();
		exnormex();
		sc0:= 0b1 || 32#0b0;
	}

/* iconst_1 */
instruct	doexiconst_1 
	par{
		sco0i1();
		exnormex();
		sc0:= 0b1 || 32#0b0001;
	}

/* iconst_2 */
instruct	doexiconst_2 
	par{
		sco0i1();
		exnormex();
		sc0:= 0b1 || 32#0b0010;
	}

/* iconst_3 */
instruct	doexiconst_3 
	par{
		sco0i1();
		exnormex();
		sc0:= 0b1 || 32#0b0011;
	}

/* iconst_4 */
instruct	doexiconst_4 
	par{
		sco0i1();
		exnormex();
		sc0:= 0b1 || 32#0b0100;
	}

/* iconst_5 */
instruct	doexiconst_5 
	par{
		sco0i1();
		exnormex();
		sc0:= 0b1 || 32#0b0101;
	}

/* lconst_0 & dconst_0 */
instruct	doexlconst_0 
	 par{
		sco0i2();
		exnormex();
		sc0:= 0b1 || 32#0b0;
		sc1:= 0b1 || 32#0b0;
	}

/* lconst_1 */
instruct	doexlconst_1 
	par{
		sco0i2();
		exnormex();
		sc0:= 0b1 || 32#0b0001;
		sc1:= 0b1 || 32#0b0;
	}

/* fconst_1 */
instruct	doexfconst_1 
	par{
		sco0i1();
		exnormex();
		sc0:= 0b1 || (0b001111111 || 23#0b0);
	}

/* fconst_2 */
instruct	doexfconst_2 
	par{
		sco0i1();
		exnormex();
		sc0:= 0b1 || (0b010000000 || 23#0b0);
	}

/* dconst_1 */
instruct	doexdconst_1 
	par{
		sco0i2();
		exnormex();
		sc0:= 0b1 || (0b001111111111 || 20#0b0);
		sc1:= 0b1 || 32#0b0;
	}


/** Load Local Variables onto the Stack */

/* (i,f,a)load[_n]) */
instruct	doexiload 
	par{
		sco0i1();
		exdmaex();
		sc0:= 0b1 || mem_re(exoperand2).dbi;
	}

/* (l,d)load[_n] (1/2) */
instruct	doexlload 
	par{
		sco0i1();
		exdmanx();
		sc0:= 0b1 || mem_re(exoperand2).dbi;
		/* r0:=exoperand2+4 */
		sel_op1_exoperand2();
		sel_op2_4();
		do_alu(0b011);
		r0:=t64<31:0>;
	}


/** Storing Stack Value into Local Variables */

/* (i,f,a)store[_n]) */
instruct	doexistore 
	 par{
		sco1i0();
		exdmaex();
		mem_we(exoperand2,scout0);
	}

/* (l,d)store[_n] (1/2) */
instruct	doexlstore 
	par{
		sco1i0();
		exdmanx();
		mem_we(exoperand2,scout0);
		/* r0:=exoperand2+4 */
		sel_op1_exoperand2();
		sel_op2_4();
		do_alu(0b011);
		r0:=t64<31:0>;
	}

/* iinc (1/3) */
instruct	doexiinc 
	 par{
		exdmanx();
		r0:=mem_re(exoperand2).dbi;
	}


/** Arithmetic Instructions */

/* iadd */
instruct	doexiadd 
	par{
		sco2i1();
		exnormex();
		/* t64=scout0+scout1 */
		sel_op1_scout0();
		sel_op2_scout1();
		do_alu(0b011);
		setsc0t64();
	}

/* ladd */
instruct	doexladd 
	par{
		sco4i2();
		exnormex();
		/* t64=(scout3||scout2)+(scout1||scout0) */
		sel_op1_scout32();
		sel_op2_sc01();
		do_alu(0b011);
		setsc01t64();
	}

/* fadd,dadd */

/* isub */
instruct	doexisub 
	par{
		sco2i1();
		exnormex();
		/* t64=scout1-scout0 */
		sel_op1_scout1();
		sel_op2_scout0();
		do_alu(0b010);
		setsc0t64();
	}

/* lsub */
instruct	doexlsub 
	 par{
		sco4i2();
		exnormex();
		/* t64=(scout3||scout2)-(scout1||scout0) */
		sel_op1_scout32();
		sel_op2_sc01();
		do_alu(0b010);
		setsc01t64();
	}

/* fsub,dsub,xmul,xdiv,xrem */

/* ineg */
instruct	doexineg 
	 par{
		sco1i1();
		exnormex();
		/* t64=0-scout0 */
		sel_op1_0();
		sel_op2_scout0();
		do_alu(0b010);
		setsc0t64();
	}
/* lneg */
instruct	doexlneg 
	par{
		exnormex();
		/* t64=0-(scout1||scout0) */
		sel_op1_0();
		sel_op2_sc01();
		do_alu(0b010);
		setsc01t64();
	}

/* fneg */
instruct	doexfneg 
	par{
		sco1i1();
		exnormex();
		sc0:= 0b1 || ^scout0<31> || scout1<30:0>;
	}

/* dneg */
instruct	doexdneg 
	par{
		exnormex();
		sc1:= 0b1 || (^scout1<31>) || scout1<30:0>;
		sc0:= 0b1 || scout0;
	}


/** Logical Instructions **/

/* ishl */
instruct	doexishl 
	par{
		sco2i1();
		exnormex();
		/* t64=scout1<<scout0 */
		t64=shifter.sll(64#scout1,scout0<5:0>).out;
		setsc0t64();
	}

/* lshl */
instruct	doexlshl 
	par{
		sco3i2();
		exnormex();

		/* t64=scout1||scout2<<scout0 */
		t64=shifter.sll(scout1||scout2,scout0<5:0>).out;

		setsc01t64();
	}

/* ishr */
instruct	doexishr 
	par{
		sco2i1();
		exnormex();

		/* t64=scout1>>scout0 */
		t64=shifter.sra(64#scout1,scout0<5:0>).out;

		setsc0t64();
	}

/* lshr */
instruct	doexlshr 
	par{
		sco3i2();
		exnormex();

		/* t64=scout1||scout2>>scout0 */
		t64=shifter.sra(scout1||scout2,scout0<5:0>).out;

		setsc01t64();
	}


/* iushr */
instruct	doexiushr 
	par{
		sco2i1();
		exnormex();

		/* t64=scout1>>scout0 */
		t64=shifter.srl(32#0b0||scout1,scout0<5:0>).out;

		setsc0t64();
	}

/* lushr */
instruct	doexlushr 
	 par{
		sco3i2();
		exnormex();

		/* t64=scout1||scout2>>scout0 */
		t64=shifter.srl(scout1||scout2,scout0<5:0>).out;

		setsc01t64();
	}

/* iand */
instruct	doexiand 
	par{
		sco2i1();
		exnormex();

		/* t64=scout0&scout1 */
		sel_op1_scout0();
		sel_op2_scout1();
		do_alu(0b110);

		setsc0t64();
	}

/* land */
instruct	doexland 
	par{
		sco4i2();
		exnormex();

		/* t64=(scout3||scout2)&(scout1||scout0) */
		sel_op1_scout32();
		sel_op2_sc01();
		do_alu(0b110);

		setsc01t64();
	}

/* ior */
instruct	doexior 
	par{
		sco2i1();
		exnormex();

		/* t64=scout0|scout1 */
		sel_op1_scout0();
		sel_op2_scout1();
		do_alu(0b101);

		setsc0t64();
	}

/* lor */
instruct	doexlor 
	 par{
		sco4i2();
		exnormex();

		/* t64=(scout3||scout2)|(scout1||scout0) */
		sel_op1_scout32();
		sel_op2_sc01();
		do_alu(0b101);

		setsc01t64();
	}

/* ixor */
instruct	doexixor 
	par{
		sco2i1();
		exnormex();

		/* t64=scout0@scout1 */
		sel_op1_scout0();
		sel_op2_scout1();
		do_alu(0b100);

		setsc0t64();
	}

/* lxor */
instruct	doexlxor 
	par{
		sco4i2();
		exnormex();

		/* t64=(scout3||scout2)@(scout1||scout0) */
		sel_op1_scout32();
		sel_op2_sc01();
		do_alu(0b100);

		setsc01t64();
	}


/** Conversion Instructions **/

/* i2l */
instruct	doexi2l 
	par{
		sco1i2();
		exnormex();

		sc0:= 0b1 || scout0;
		sc1:= 0b1 || 32#scout0<31>;
	}

/* l2i */
instruct	doexl2i 
	 par{
		sco2i1();
		exnormex();

		sc0:= 0b1 || scout0;
	}

/* int2byte */
instruct	doexint2byte 
	 par{
		sco1i1();
		exnormex();

		sc0:= 0b1 || 32#scout0<7:0>;
	}

/* int2char */
instruct	doexint2char 
	par{
		sco1i1();
		exnormex();

		sc0:= 0b1 || 16#0b0 || scout0<15:0>;
	}

/* int2short */
instruct	doexint2short 
	par{
		sco1i1();
		exnormex();

		sc0:= 0b1 || 32#scout0<15:0>;
	}

/** Original Instructions **/

/* ch_sp */
instruct	doexch_sp 
	 par{
		scch_sp=0b1;
		exnormex();
	}

/* ch_vars */
instruct	doexch_vars 
	 par{
		sco1i0();
		exnormex();
		vars:=scout0;
	}

/* ch_expt */
instruct	doexch_expt 
	par{
		sco1i0();
		exnormex();
		expt:=scout0;
	}

/* load */
instruct	doexload 
	 par{
		sco1i1();
		exdmaex();
		sc0:= 0b1 || mem_re(scout0).dbi;
	}

/* load_w (1/2) */
instruct	doexload_w 
	 par{
		sco1i1();
		exdmanx();

		sc0:= 0b1 || mem_re(scout0).dbi;

		/* r0=scout0+4 */
		sel_op1_scout0();
		sel_op2_4();
		do_alu(0b011);
		r0:=t64<31:0>;
	}


/* store */
instruct	doexstore 
	 par{
		sco2i0();
		exdmaex();
		mem_we(scout0,scout1);
	}

/* store_w (1/2) */
instruct	doexstore_w 
	 par{
		sco3i0();
		exdmanx();
		mem_we(scout0,scout1);
		/* r0=scout0+4 */
		sel_op1_scout0();
		sel_op2_4();
		do_alu(0b011);
		r0:=t64<31:0>;
		r1:=scout2;
	}

/* push_pc */
instruct	doexpush_pc 
	par{
		sco0i1();
		exnormex();

		sc0:= 0b1 || expc;
	}

/* push_sp */
instruct	doexpush_sp 
	par{
		sco0i1();
		exnormex();

		sc0:= 0b1 || sp;
	}

/* push_vars */
instruct	doexpush_vars 
	 par{
		sco0i1();
		exnormex();

		sc0:= 0b1 || vars;
	}

/* push_expt */
instruct	doexpush_expt 
	par{
		sco0i1();
		exnormex();

		sc0:= 0b1 || expt;
	}

/* jump */

instruct	doexjump 
	 par{
		sco1i0();
		exjmp();
		newpc_tmp=scout0;
	}

/* jump_sr */
instruct	doexjump_sr 
	par{
		sco1i1();
		exjmp();

		newpc_tmp=scout0;

		/* t64=exoperand2+2 */
		sel_op1_exoperand2();
		sel_op2_2();
		do_alu(0b011);

		setsc0t64();

	}

/* nload & nstore */
instruct	doexnload 
	 par{
		sco2i0();
		branch=0b0;
		dma=0b0;

		/* r0=last+4, r1=address */
		sel_op1_scout0();
		sel_op2_bt();
		do_alu(0b011);
		r0:=t64<31:0>;
		r1:=scout0;

	}

/* Exceptional Instructions */

instruct	doexexcpt 
	 par{
		sco0i2();
		branch=0b0;
		dma=0b0;
		newpc_tmp=32#0b0;
		exrls=0b0;

		r0:=exopl.do(exop).out;
		sc0:= 0b1 || (exop||24#0b0);
		sc1:= 0b1 || exoperand;
	}

/* SC Elements Up/Down Instructions */

	instruct scd1  par{
		sp:=spinc.do(0b0,sp,32#0b0100).out;

		sc6:=sc5;
		sc7:=sc6;
		sc8:=sc7;
		sc9:=sc8;
		sc10:=sc9;
		sc11:=sc10;
		sc12:=sc11;
		sc13:=sc12;
		sc14:=sc13;
		sc15:=sc14;
		sc16:=sc15;
		sc17:=sc16;
		sc18:=sc17;
		sc19:=sc18;
		sc20:=sc19;
		sc21:=sc20;
		sc22:=sc21;
		sc23:=sc22;
		sc24:=sc23;
		sc25:=sc24;
		sc26:=sc25;
		sc27:=sc26;
		sc28:=sc27;
		sc29:=sc28;
		sc30:=sc29;
		sc31:=sc30;
	}

	instruct scd2  par{

		sp:=spinc.do(0b0,sp,32#0b01000).out;

		sc6:=sc4;
		sc7:=sc5;
		sc8:=sc6;
		sc9:=sc7;
		sc10:=sc8;
		sc11:=sc9;
		sc12:=sc10;
		sc13:=sc11;
		sc14:=sc12;
		sc15:=sc13;
		sc16:=sc14;
		sc17:=sc15;
		sc18:=sc16;
		sc19:=sc17;
		sc20:=sc18;
		sc21:=sc19;
		sc22:=sc20;
		sc23:=sc21;
		sc24:=sc22;
		sc25:=sc23;
		sc26:=sc24;
		sc27:=sc25;
		sc28:=sc26;
		sc29:=sc27;
		sc30:=sc28;
		sc31:=sc29;
	}

	instruct scu1 par{

		sp:=spinc.do(0b0,sp,32#0b1100).out;

		sc6:=sc7;
		sc7:=sc8;
		sc8:=sc9;
		sc9:=sc10;
		sc10:=sc11;
		sc11:=sc12;
		sc12:=sc13;
		sc13:=sc14;
		sc14:=sc15;
		sc15:=sc16;
		sc16:=sc17;
		sc17:=sc18;
		sc18:=sc19;
		sc19:=sc20;
		sc20:=sc21;
		sc21:=sc22;
		sc22:=sc23;
		sc23:=sc24;
		sc24:=sc25;
		sc25:=sc26;
		sc26:=sc27;
		sc27:=sc28;
		sc28:=sc29;
		sc29:=sc30;
		sc30:=sc31;
		sc31:=33#0b0;
	}

	instruct scu2 par{

		sp:=spinc.do(0b0,sp,32#0b1000).out;

		sc6:=sc8;
		sc7:=sc9;
		sc8:=sc10;
		sc9:=sc11;
		sc10:=sc12;
		sc11:=sc13;
		sc12:=sc14;
		sc13:=sc15;
		sc14:=sc16;
		sc15:=sc17;
		sc16:=sc18;
		sc17:=sc19;
		sc18:=sc20;
		sc19:=sc21;
		sc20:=sc22;
		sc21:=sc23;
		sc22:=sc24;
		sc23:=sc25;
		sc24:=sc26;
		sc25:=sc27;
		sc26:=sc28;
		sc27:=sc29;
		sc28:=sc30;
		sc29:=sc31;
		sc30:=33#0b0;
		sc31:=33#0b0;
	}

	instruct scu3 par{

		sp:=spinc.do(0b0,sp,32#0b10100).out;

		sc6:=sc9;
		sc7:=sc10;
		sc8:=sc11;
		sc9:=sc12;
		sc10:=sc13;
		sc11:=sc14;
		sc12:=sc15;
		sc13:=sc16;
		sc14:=sc17;
		sc15:=sc18;
		sc16:=sc19;
		sc17:=sc20;
		sc18:=sc21;
		sc19:=sc22;
		sc20:=sc23;
		sc21:=sc24;
		sc22:=sc25;
		sc23:=sc26;
		sc24:=sc27;
		sc25:=sc28;
		sc26:=sc29;
		sc27:=sc30;
		sc28:=sc31;
		sc29:=33#0b0;
		sc30:=33#0b0;
		sc31:=33#0b0;
	}

	instruct scu4 par{

		sp:=spinc.do(0b0,sp,32#0b10000).out;

		sc6:=sc10;
		sc7:=sc11;
		sc8:=sc12;
		sc9:=sc13;
		sc10:=sc14;
		sc11:=sc15;
		sc12:=sc16;
		sc13:=sc17;
		sc14:=sc18;
		sc15:=sc19;
		sc16:=sc20;
		sc17:=sc21;
		sc18:=sc22;
		sc19:=sc23;
		sc20:=sc24;
		sc21:=sc25;
		sc22:=sc26;
		sc23:=sc27;
		sc24:=sc28;
		sc25:=sc29;
		sc26:=sc30;
		sc27:=sc31;
		sc28:=33#0b0;
		sc29:=33#0b0;
		sc30:=33#0b0;
		sc31:=33#0b0;
	}



/* SC External Instructions  */

	/* Output=0 */
		/* Input=0 -> No Operation */
		/* Input=1 */
instruct sco0i1 par{
			scd1();
			sc1:=sc0;
			sc2:=sc1;
			sc3:=sc2;
			sc4:=sc3;
			sc5:=sc4;
		}
		/* Input=2 */
instruct sco0i2 par{
			scd2();
			sc2:=sc0;
			sc3:=sc1;
			sc4:=sc2;
			sc5:=sc3;
		}
	/* Output=1 */
		/* Input=0 */
instruct sco1i0 par{
			scu1();
			sc0:=sc1;
			sc1:=sc2;
			sc2:=sc3;
			sc3:=sc4;
			sc4:=sc5;
			sc5:=sc6;
		}
		/* Input=1 -> No Operation */
		/* Input=2 */
instruct sco1i2 par{
			scd1();
			sc2:=sc1;
			sc3:=sc2;
			sc4:=sc3;
			sc5:=sc4;
		}
	/* Output=2 */
		/* Input=0 */
instruct sco2i0 par{
			scu2();
			sc0:=sc2;
			sc1:=sc3;
			sc2:=sc4;
			sc3:=sc5;
			sc4:=sc6;
			sc5:=sc7;
		}
		/* Input=1 */
instruct sco2i1 par{
			scu1();
			sc1:=sc2;
			sc2:=sc3;
			sc3:=sc4;
			sc4:=sc5;
			sc5:=sc6;
		}
		/* Input=2 -> No Operation */
	/* Output=3 */
		/* Input=0 */
instruct sco3i0 par{
			scu3();
			sc0:=sc3;
			sc1:=sc4;
			sc2:=sc5;
			sc3:=sc6;
			sc4:=sc7;
			sc5:=sc8;
		}
		/* Input=1 */
instruct sco3i1 par{
			scu2();
			sc1:=sc3;
			sc2:=sc4;
			sc3:=sc5;
			sc4:=sc6;
			sc5:=sc7;
		}
		/* Input=2 */
instruct sco3i2 par{
			scu1();
			sc2:=sc3;
			sc3:=sc4;
			sc4:=sc5;
			sc5:=sc6;
		}
	/* Output=4 */
		/* Input=0 */
instruct sco4i0 par{
			scu4();
			sc0:=sc4;
			sc1:=sc5;
			sc2:=sc6;
			sc3:=sc7;
			sc4:=sc8;
			sc5:=sc9;
		}
		/* Input=1 */
instruct sco4i1 par{
			scu3();
			sc1:=sc4;
			sc2:=sc5;
			sc3:=sc6;
			sc4:=sc7;
			sc5:=sc8;
		}
		/* Input=2 */
instruct sco4i2 par{
			scu2();
			sc2:=sc4;
			sc3:=sc5;
			sc4:=sc6;
			sc5:=sc7;
		}


/* SC Internal Instructions  */

	/* pop */
instruct scpop par{
		scu1();
		sc0:=sc1;
		sc1:=sc2;
		sc2:=sc3;
		sc3:=sc4;
		sc4:=sc5;
		sc5:=sc6;
	}

	/* pop2 */
instruct scpop2 par{
		scu2();
		sc0:=sc2;
		sc1:=sc3;
		sc2:=sc4;
		sc3:=sc5;
		sc4:=sc6;
		sc5:=sc7;
	}

	/* dup */
instruct scdup par{
		scd1();
		sc1:=sc0;
		sc2:=sc1;
		sc3:=sc2;
		sc4:=sc3;
		sc5:=sc4;
	}

	/* dup2 */
instruct scdup2 par{
		scd2();
		sc2:=sc0;
		sc3:=sc1;
		sc4:=sc2;
		sc5:=sc3;
	}

	/* dup_x1 */
instruct scdup_x1 par{
		scd1();
		sc2:=sc0;
		sc3:=sc2;
		sc4:=sc3;
		sc5:=sc4;
	}

	/* dup2_x1 */
instruct scdup2_x1 par{
		scd2();
		sc0:=sc0;
		sc1:=sc1;
		sc2:=sc2;
		sc3:=sc0;
		sc4:=sc1;
		sc5:=sc3;
	}

	/* dup_x2 */
instruct scdup_x2 par{
		scd1();
		sc3:=sc0;
		sc4:=sc3;
		sc5:=sc4;
	}


	/* dup2_x2 */
instruct scdup2_x2 par{
		scd2();
		sc0:=sc0;
		sc1:=sc1;
		sc2:=sc2;
		sc3:=sc3;
		sc4:=sc0;
		sc5:=sc1;
	}

	/* swap */
instruct scswap par{
		sc0:=sc1;
		sc1:=sc0;
	}




	/********** Description of Stack Cache **********/

	stage stack{

		state_name	scnormal,scwb0,scwb,scdf,scdf2,scstart,scstart2,scch;
		first_state 	scstart;

		/** SC Start Mode **/

		state scstart par{

			scv=0b0;
			sp0:=spinc.do(0b0,sp,32#0b1100).out;
			sccount:=8#0b0001;
			scma=0b1;

			sc0:=0b1 || mem_re(sp).dbi;

			sc1:=33#0b0;
			sc2:=33#0b0;
			sc3:=33#0b0;
			sc4:=33#0b0;
			sc5:=33#0b0;
			sc6:=33#0b0;
			sc7:=33#0b0;
			sc8:=33#0b0;
			sc9:=33#0b0;
			sc10:=33#0b0;
			sc11:=33#0b0;
			sc12:=33#0b0;
			sc13:=33#0b0;
			sc14:=33#0b0;
			sc15:=33#0b0;
			sc16:=33#0b0;
			sc17:=33#0b0;
			sc18:=33#0b0;
			sc19:=33#0b0;
			sc20:=33#0b0;
			sc21:=33#0b0;
			sc22:=33#0b0;
			sc23:=33#0b0;
			sc24:=33#0b0;
			sc25:=33#0b0;
			sc26:=33#0b0;
			sc27:=33#0b0;
			sc28:=33#0b0;
			sc29:=33#0b0;
			sc30:=33#0b0;
			sc31:=33#0b0;
			goto scstart2;
		}

		state scstart2 par{

			scv=0b0;
			sp0:=spinc.do(0b0,sp0,32#0b1100).out;
			sccount:=scinc.do(0b0,sccount,8#0b01).out;
			scma=0b1;

			any {
				/* sccount=1 sp0=(sp-4)*/
				^sccount<1> & sccount<0> : sc1:=0b1 || mem_re(sp0).dbi;

				/* sccount=2 sp0=(sp-8)*/
				sccount<1> & ^sccount<0> : sc2:=0b1 || mem_re(sp0).dbi;

				/* sccount=3 sp0=(sp-12)*/
				sccount<1> & sccount<0> : par{
					sc3:=0b1 || mem_re(sp0).dbi;
					goto scnormal; /* goto scnormal mode */
				}
			}
		}


		/** SC Normal Mode **/

		state scnormal par{

			scma=0b0;
			scv=0b1;

			/* Align Output Data */

			scout0=sc0<31:0>;
			scout1=sc1<31:0>;
			scout2=sc2<31:0>;
			scout3=sc3<31:0>;


			/* State Control */

			sctmp1=(^sc4<32> & (scu1 | scu2 | scu3 | scu4));
			sctmp2=(^sc5<32> & (scu2 | scu3 | scu4));
			sctmp3=(^sc6<32> & (scu3 | scu4));
			sctmp4=(^sc7<32> & scu4);

			any {
				/* ch_sp Instruction Was Driven */
				scch_sp : par{
						sp:=sc0<31:0>;
						sp0:=spinc.do(0b0,sp,32#0b1100).out;
						sccount:=8#0b01;

						goto scch;
				}

				/* Data Shortage */
				(sctmp1 | sctmp2 | sctmp3 | sctmp4) : goto scdf;

				/* Data Overflow */
				(sc29<32> & (scd1 | scd2) ) | (sc28<32> & scd2) : goto scwb0;

			}
		}


		/** SC Data Fetch Mode **/

		state scdf par{
			sp0:=spinc.do(0b0,sp,32#0b10000).out; /* sp0=(sp-16) */
			sccount:=8#0b0100; /* sccount=4 */
			scma=0b0;
			scv=0b0;
			goto scdf2;
		}

		state scdf2 par{

			sp0:=spinc.do(0b0,sp0,32#0b0100).out; /* sp0+=4 */
			sccount:=scinc.do(0b0,sccount,8#0b1111).out; /* sccount-=1 */
			scma=0b1;
			scv=0b0;

			any {

				/* sccount=0 sp0=(sp) and goto normal mode*/
				^sccount<4> & ^sccount<3> & ^sccount<2> & ^sccount<1> & ^sccount<0> : par{
					sc0:=0b1 || mem_re(sp0).dbi;
					goto scnormal; /* goto scnormal mode */
				}

				/* sccount=1 sp0=(sp-4)*/
				^sccount<4> & ^sccount<3> & ^sccount<2> & ^sccount<1> & sccount<0> : par{
					sc1:=0b1 || mem_re(sp0).dbi;
					any{
						sc0<32> : goto scnormal;
					}
				}

				/* sccount=2 sp0=(sp-8)*/
				^sccount<4> & ^sccount<3> & ^sccount<2> & sccount<1> & ^sccount<0> : par{
					sc2:=0b1 || mem_re(sp0).dbi;
					any{
						sc1<32> :  goto scnormal;
					}
				}

				/* sccount=3 sp0=(sp-12)*/
				^sccount<4> & ^sccount<3> & ^sccount<2> & sccount<1> & sccount<0> : par{
					sc3:=0b1 || mem_re(sp0).dbi;
					any{
						sc2<32> : goto scnormal;
					}
				}

				/* sccount=4 sp0=(sp-16)*/
				^sccount<4> & ^sccount<3> & sccount<2> & ^sccount<1> & ^sccount<0> : par{
					sc4:=0b1 || mem_re(sp0).dbi;
					any{
						sc3<32> : goto scnormal;
					}
				}
			}
		}



		/** SC write back mode **/

		state scwb0 par{
			sp0:=spinc.do(0b0,sp,32#0b10001100).out; /* sp0=(sp-116) */
			sccount:=8#0b00011101; /* sccount=29 */
			scma=0b0;
			scv=0b0;

			goto scwb;
		}

		state scwb par{

			sp0:=spinc.do(0b0,sp0,32#0b1100).out; /* sp0=(sp0-4) */
			sccount:=scinc.do(0b0,sccount,8#0b0001).out; /* sccount=sccount+1 */
			scma=0b1;
			scv=0b0;

			any {
				/* sccount=29 sp0=(sp-116)*/
				sccount<4> & sccount<3> & sccount<2> & ^sccount<1> & sccount<0> : par{
					mem_we(sp0,sc29<31:0>);
					sc29:=33#0b0;
					any{
						^sc30<32> : goto scnormal;
					}
				}

				/* sccount=30 sp0=(sp-120)*/
				sccount<4> & sccount<3> & sccount<2> & sccount<1> & ^sccount<0> : par{
					mem_we(sp0,sc30<31:0>);
					sc30:=33#0b0;
					any{
						^sc31<32> : goto scnormal;
					}
				}

				/* sccount=31 sp0=(sp-124) and goto Normal mode*/
				sccount<4> & sccount<3> & sccount<2> & sccount<1> & sccount<0> : par{
					mem_we(sp0,sc31<31:0>);
					sc31:=33#0b0;
					goto scnormal; /* goto scnormal mode */
				}
			}
		}



		/* scch Mode */

		state scch par{

			sp0:=spinc.do(0b0,sp0,32#0b1100).out; /* sp0-=4 */
			sccount:=scinc.do(0b0,sccount,8#0b0001).out; /* sccount++ */
			scma=0b1;
			scv=0b0;

			/* Write Back All Entries and Restart SC */

			any {

				/* sccount=0 sp0=(sp) [This sp is old sp]*/
				^sccount<4> & ^sccount<3> & ^sccount<2> & ^sccount<1> & ^sccount<0> : par{
					mem_we(sp0,sc0<31:0>);
					sc0:=33#0b0;
					any{
						^sc1<32> : goto scstart;
					}
				}

				/* sccount=1 sp0=(sp-4)*/
				^sccount<4> & ^sccount<3> & ^sccount<2> & ^sccount<1> &  sccount<0> : par{
					mem_we(sp0,sc1<31:0>);
					sc1:=33#0b0;
					any{
						^sc2<32> : goto scstart;
					}
				}

				/* sccount=2 sp0=(sp-8)*/
				^sccount<4> & ^sccount<3> & ^sccount<2> &  sccount<1> & ^sccount<0> : par{
					mem_we(sp0,sc2<31:0>);
					sc2:=33#0b0;
					any{
						^sc3<32> : goto scstart;
					}
				}

				/* sccount=3 sp0=(sp-12)*/
				^sccount<4> & ^sccount<3> & ^sccount<2> &  sccount<1> &  sccount<0> : par{
					mem_we(sp0,sc3<31:0>);
					sc3:=33#0b0;
					any{
						^sc4<32> : goto scstart;
					}
				}

				/* sccount=4 sp0=(sp-16)*/
				^sccount<4> & ^sccount<3> &  sccount<2> & ^sccount<1> & ^sccount<0> : par{
					mem_we(sp0,sc4<31:0>);
					sc4:=33#0b0;
					any{
						^sc5<32> : goto scstart;
					}
				}

				/* sccount=5 sp0=(sp-20)*/
				^sccount<4> & ^sccount<3> &  sccount<2> & ^sccount<1> &  sccount<0> : par{
					mem_we(sp0,sc5<31:0>);
					sc5:=33#0b0;
					any{
						^sc6<32> : goto scstart;
					}
				}

				/* sccount=6 sp0=(sp-24)*/
				^sccount<4> & ^sccount<3> &  sccount<2> &  sccount<1> & ^sccount<0> : par{
					mem_we(sp0,sc6<31:0>);
					sc6:=33#0b0;
					any{
						^sc7<32> : goto scstart;
					}
				}

				/* sccount=7 sp0=(sp-28)*/
				^sccount<4> & ^sccount<3> &  sccount<2> &  sccount<1> &  sccount<0> : par{
					mem_we(sp0,sc7<31:0>);
					sc7:=33#0b0;
					any{
						^sc8<32> : goto scstart;
					}
				}

				/* sccount=8 sp0=(sp-32)*/
				^sccount<4> &  sccount<3> & ^sccount<2> & ^sccount<1> & ^sccount<0> : par{
					mem_we(sp0,sc8<31:0>);
					sc8:=33#0b0;
					any{
						^sc9<32> : goto scstart;
					}
				}

				/* sccount=9 sp0=(sp-36)*/
				^sccount<4> &  sccount<3> & ^sccount<2> & ^sccount<1> &  sccount<0> : par{
					mem_we(sp0,sc9<31:0>);
					sc9:=33#0b0;
					any{
						^sc10<32> : goto scstart;
					}
				}

				/* sccount=10 sp0=(sp-40)*/
				^sccount<4> &  sccount<3> & ^sccount<2> &  sccount<1> & ^sccount<0> : par{
					mem_we(sp0,sc10<31:0>);
					sc10:=33#0b0;
					any{
						^sc11<32> : goto scstart;
					}
				}

				/* sccount=11 sp0=(sp-44)*/
				^sccount<4> &  sccount<3> & ^sccount<2> &  sccount<1> &  sccount<0> : par{
					mem_we(sp0,sc11<31:0>);
					sc11:=33#0b0;
					any{
						^sc12<32> :  goto scstart;
					}
				}

				/* sccount=12 sp0=(sp-48)*/
				^sccount<4> &  sccount<3> &  sccount<2> & ^sccount<1> & ^sccount<0> : par{
					mem_we(sp0,sc12<31:0>);
					sc12:=33#0b0;
					any{
						^sc13<32> : goto scstart;
					}
				}

				/* sccount=13 sp0=(sp-52)*/
				^sccount<4> &  sccount<3> &  sccount<2> & ^sccount<1> &  sccount<0> : par{
					mem_we(sp0,sc13<31:0>);
					sc13:=33#0b0;
					any{
						^sc14<32> : goto scstart;
					}
				}

				/* sccount=14 sp0=(sp-56)*/
				^sccount<4> &  sccount<3> &  sccount<2> &  sccount<1> & ^sccount<0> : par{
					mem_we(sp0,sc14<31:0>);
					sc14:=33#0b0;
					any{
						^sc15<32> : goto scstart;
					}
				}

				/* sccount=15 sp0=(sp-60)*/
				^sccount<4> &  sccount<3> &  sccount<2> &  sccount<1> &  sccount<0> : par{
					mem_we(sp0,sc15<31:0>);
					sc15:=33#0b0;
					any{
						^sc16<32> : goto scstart;
					}
				}

				/* sccount=16 sp0=(sp-64)*/
				 sccount<4> & ^sccount<3> & ^sccount<2> & ^sccount<1> & ^sccount<0> : par{
					mem_we(sp0,sc16<31:0>);
					sc16:=33#0b0;
					any{
						^sc17<32> : goto scstart;
					}
				}

				/* sccount=17 sp0=(sp-68)*/
				 sccount<4> & ^sccount<3> & ^sccount<2> & ^sccount<1> &  sccount<0> : par{
					mem_we(sp0,sc17<31:0>);
					sc17:=33#0b0;
					any{
						^sc18<32> : goto scstart;
					}
				}

				/* sccount=18 sp0=(sp-72)*/
				 sccount<4> & ^sccount<3> & ^sccount<2> &  sccount<1> & ^sccount<0> : par{
					mem_we(sp0,sc18<31:0>);
					sc18:=33#0b0;
					any{
						^sc19<32> : goto scstart;
					}
				}

				/* sccount=19 sp0=(sp-76)*/
				 sccount<4> & ^sccount<3> & ^sccount<2> &  sccount<1> &  sccount<0> : par{
					mem_we(sp0,sc19<31:0>);
					sc19:=33#0b0;
					any{
						^sc20<32> : goto scstart;
					}
				}

				/* sccount=20 sp0=(sp-80)*/
				 sccount<4> & ^sccount<3> &  sccount<2> & ^sccount<1> & ^sccount<0> : par{
					mem_we(sp0,sc20<31:0>);
					sc20:=33#0b0;
					any{
						^sc21<32> : goto scstart;
					}
				}

				/* sccount=21 sp0=(sp-84)*/
				 sccount<4> & ^sccount<3> &  sccount<2> & ^sccount<1> &  sccount<0> : par{
					mem_we(sp0,sc21<31:0>);
					sc21:=33#0b0;
					any{
						^sc22<32> : goto scstart;
					}
				}

				/* sccount=22 sp0=(sp-88)*/
				 sccount<4> & ^sccount<3> &  sccount<2> &  sccount<1> & ^sccount<0> : par{
					mem_we(sp0,sc22<31:0>);
					sc22:=33#0b0;
					any{
						^sc23<32> : goto scstart;
					}
				}

				/* sccount=23 sp0=(sp-92)*/
				 sccount<4> & ^sccount<3> &  sccount<2> &  sccount<1> &  sccount<0> : par{
					mem_we(sp0,sc23<31:0>);
					sc23:=33#0b0;
					any{
						^sc24<32> : goto scstart;
					}
				}

				/* sccount=24 sp0=(sp-96)*/
				 sccount<4> &  sccount<3> & ^sccount<2> & ^sccount<1> & ^sccount<0> : par{
					mem_we(sp0,sc24<31:0>);
					sc24:=33#0b0;
					any{
						^sc25<32> : goto scstart;
					}
				}

				/* sccount=25 sp0=(sp-100)*/
				 sccount<4> &  sccount<3> & ^sccount<2> & ^sccount<1> &  sccount<0> : par{
					mem_we(sp0,sc25<31:0>);
					sc25:=33#0b0;
					any{
						^sc26<32> : goto scstart;
					}
				}

				/* sccount=26 sp0=(sp-104)*/
				 sccount<4> &  sccount<3> & ^sccount<2> &  sccount<1> & ^sccount<0> : par{
					mem_we(sp0,sc26<31:0>);
					sc26:=33#0b0;
					any{
						^sc27<32> : goto scstart;
					}
				}

				/* sccount=27 sp0=(sp-108)*/
				 sccount<4> &  sccount<3> & ^sccount<2> &  sccount<1> &  sccount<0> : par{
					mem_we(sp0,sc27<31:0>);
					sc27:=33#0b0;
					any{
						^sc28<32> : goto scstart;
					}
				}

				/* sccount=28 sp0=(sp-112)*/
				 sccount<4> &  sccount<3> &  sccount<2> & ^sccount<1> & ^sccount<0> : par{
					mem_we(sp0,sc28<31:0>);
					sc28:=33#0b0;
					any{
						^sc29<32> : goto scstart;
					}
				}

				/* sccount=29 sp0=(sp-116)*/
				 sccount<4> &  sccount<3> &  sccount<2> & ^sccount<1> &  sccount<0> : par{
					mem_we(sp0,sc29<31:0>);
					sc29:=33#0b0;
					any{
						^sc30<32> :  goto scstart;
					}
				}

				/* sccount=30 sp0=(sp-120)*/
				 sccount<4> &  sccount<3> &  sccount<2> &  sccount<1> & ^sccount<0> : par{
					mem_we(sp0,sc30<31:0>);
					sc30:=33#0b0;
					any{
						^sc31<32> : goto scstart;
					}
				}

				/* sccount=31 sp0=(sp-124) and goto Normal mode*/
				 sccount<4> &  sccount<3> &  sccount<2> &  sccount<1> &  sccount<0> : par{
					mem_we(sp0,sc31<31:0>);
					sc31:=33#0b0;
					goto scstart;
				}
			}
		}

	}/**** End of the stage STACK CACHE ****/








	/********** Description of Instruction Fetch Stage **********/

	stage if{

		state_name	ifnormal,ifclear;
		first_state 	ifclear;


		/** state ifclear **/

		state ifclear par{

			pcif:=pc;
			idata0:=33#0b0;
			idata1:=33#0b0;
			idata2:=33#0b0;
			idata3:=33#0b0;

			goto ifnormal;
		}


		/** state ifnormal **/

		state ifnormal par{

			pcifnext=incif.do(0b0,pcif,32#0b0100).out; /* pcif+=4 */

			any {
				^scma & ^dma : idata=0b1 || mem_re(pcif).dbi;
			}

			/* Check if the entry to write is free and scma and dma is 0, then write idata and set pcifnext */

			any {
				^scma & ^dma & ^branch : any {

					^pcif<3> & ^pcif<2> & ^idata0<32> : par{
						idata0:=idata;
						pcif:=pcifnext;
					}

					^pcif<3> &  pcif<2> & ^idata1<32> : par{
						idata1:=idata;
						pcif:=pcifnext;
					}

					 pcif<3> & ^pcif<2> & ^idata2<32> : par{
						idata2:=idata;
						pcif:=pcifnext;
					}

					 pcif<3> &  pcif<2> & ^idata3<32> : par{
						idata3:=idata;
						pcif:=pcifnext;
					}
				}
			}

			/* branch=0b1 -> clear all Entries and set branch address */

			any {
				branch : par{
					pcif:=newpc_tmp;
					idata0:=33#0b0;
					idata1:=33#0b0;
					idata2:=33#0b0;
					idata3:=33#0b0;
				}
			}
		}
	} /**** End of the stage IF ****/





	/********** Description of Instruction Decode Stage **********/

	stage id{

		state_name	idnormal,idclear;
		first_state 	idclear;


		/** state idclear **/

		state idclear par{

			exdata0:=73#0b0;
			exdata1:=73#0b0;
			exdata2:=73#0b0;
			exdata3:=73#0b0;
			wcounter:=0b00;

			goto idnormal;

		}


		/** state idnormal **/

		state idnormal par{

			/* EX Buffer Free Check */

			any {
				^wcounter<1> & ^wcounter<0> & ^exdata0<72> : exbf=0b1;
				^wcounter<1> &  wcounter<0> & ^exdata1<72> : exbf=0b1;
				 wcounter<1> & ^wcounter<0> & ^exdata2<72> : exbf=0b1;
				 wcounter<1> &  wcounter<0> & ^exdata3<72> : exbf=0b1;

				else  : exbf=0b0;
			}


			/* IF Data Valid Check */

			any {
				^pc<3> & ^pc<2> & idata0<32> & idata1<32> : par{
					ifdv=0b1;
					ifd=irsft.do( idata0<31:0> || idata1<31:0> ,pc<1:0>).out;
				}

				^pc<3> &  pc<2> & idata1<32> & idata2<32> : par{
					ifdv=0b1;
					ifd=irsft.do( idata1<31:0> || idata2<31:0> ,pc<1:0>).out;
				}

				 pc<3> & ^pc<2> & idata2<32> & idata3<32> : par{
					ifdv=0b1;
					ifd=irsft.do( idata2<31:0> || idata3<31:0> ,pc<1:0>).out;
				}

				 pc<3> &  pc<2> & idata3<32> & idata0<32> : par{
					ifdv=0b1;
					ifd=irsft.do( idata3<31:0> || idata0<31:0> ,pc<1:0>).out;
				}

				else : par{
					ifdv=0b0;
					ifd=64#0b0;
				}
			}


			/* Find Instruction Length */

			length=oplength.do(ifd<63:56>).out;


			/* Find number of Entries to Release */

			any {
				/* pc<1:0>=0b00 */
				^pc<1> & ^pc<0> &  length<2> & ^length<1> & ^length<0> : rls=0b01; /* length=4 */
				^pc<3> & ^pc<0> &  length<2> & ^length<1> &  length<0> : rls=0b01; /* length=5 */

				/* pc<1:0>=0b01 */
				^pc<1> &  pc<0> & ^length<2> &  length<1> &  length<0> : rls=0b01; /* length=3 */
				^pc<1> &  pc<0> &  length<2> & ^length<1> & ^length<0> : rls=0b01; /* length=4 */
				^pc<1> &  pc<0> &  length<2> & ^length<1> &  length<0> : rls=0b01; /* length=5 */

				/* pc<1:0>=0b10 */
				 pc<1> & ^pc<0> & ^length<2> &  length<1> & ^length<0> : rls=0b01; /* length=2 */
				 pc<1> & ^pc<0> & ^length<2> &  length<1> &  length<0> : rls=0b01; /* length=3 */
				 pc<1> & ^pc<0> &  length<2> & ^length<1> & ^length<0> : rls=0b01; /* length=4 */
				 pc<1> & ^pc<0> &  length<2> & ^length<1> &  length<0> : rls=0b01; /* length=5 */

				/* pc<1:0>=0b11 */
				 pc<1> &  pc<0> & ^length<2> & ^length<1> &  length<0> : rls=0b01; /* length=1 */
				 pc<1> &  pc<0> & ^length<2> &  length<1> & ^length<0> : rls=0b01; /* length=2 */
				 pc<1> &  pc<0> & ^length<2> &  length<1> &  length<0> : rls=0b01; /* length=3 */
				 pc<1> &  pc<0> &  length<2> & ^length<1> & ^length<0> : rls=0b01; /* length=4 */

				 pc<1> &  pc<0> &  length<2> & ^length<1> &  length<0> : rls=0b10; /* length=5 */

				else : rls=0b00;

			}


			/* Compute next pc and exdata */

			pcnext=pcinc.do(0b0,pc,length).out;
			exdata=0b1 || ifd<63:24> || pc;

			/* Start Writing */

			any {
				ifdv & exbf & ^branch: par{

					/* Set New Program Counter */

					pc:=pcnext;

					/* Write EX Data Buffer */

					any {
						^wcounter<1> & ^wcounter<0> : par{
							exdata0:=exdata;
							wcounter:=0b01;
						}

						^wcounter<1> & wcounter<0> : par{
							exdata1:=exdata;
							wcounter:=0b10;
						}

						wcounter<1> & ^wcounter<0> : par{
							exdata2:=exdata;
							wcounter:=0b11;
						}

						wcounter<1> & wcounter<0> : par{
							exdata3:=exdata;
							wcounter:=0b00;
						}
					}

					/* Release Entries */

					any {
						^pc<3> & ^pc<2> : any {
							^rls<1> &  rls<0> : idata0:=33#0b0;
							 rls<1> & ^rls<0> : par{
								idata0:=33#0b0;
								idata1:=33#0b0;
							}
						}

						^pc<3> &  pc<2> : any {
							^rls<1> &  rls<0> : idata1:=33#0b0;
							 rls<1> & ^rls<0> : par{
								idata1:=33#0b0;
								idata2:=33#0b0;
							}
						}

						 pc<3> & ^pc<2> : any {
							^rls<1> &  rls<0> : idata2:=33#0b0;
							 rls<1> & ^rls<0> : par{
								idata2:=33#0b0;
								idata3:=33#0b0;
							}
						}

						 pc<3> &  pc<2> : any {
							^rls<1> &  rls<0> : idata3:=33#0b0;
							 rls<1> & ^rls<0> : par{
								idata3:=33#0b0;
								idata0:=33#0b0;
							}
						}
					}
				}
			}


			/* Branch */

			any {
				branch : par {
					exdata0:=73#0b0;
					exdata1:=73#0b0;
					exdata2:=73#0b0;
					exdata3:=73#0b0;

					wcounter:=0b00;
					pc:=newpc_tmp;
				}
			}
		}
	}/**** End of the stage ID ****/





	/********** Description of Operand Creation Stage **********/

	stage oc{

		state_name	occlear,ocnormal;
		first_state 	occlear;

		/** state occlear **/

		state occlear par{

			excounter:=0b00; /* Refresh EX Counter */
			goto ocnormal;
		}


		/** state ocnormal **/

		state ocnormal par{

			any {
				branch : par {
					excounter:=0b00;
					exop:=8#0b0;
					exoperand:=32#0b0;
					exoperand2:=32#0b0;
				}
			}


			/* Divide Execution Data and Release Entry */

			any {

				/* excounter=0 */
				^excounter<1> & ^excounter<0> : par{
					exv=exdata0<72>;
					ocdata=exdata0;
					any {
						exrls & exv & ^branch & ^exch_vars : par{
							exdata0:=73#0b0;
							excounter:=0b01;
							exop:=ocdata<71:64>;
							exoperand:=ocdata<63:32>;
							exoperand2:=ocoperand2;
							expc:=ocdata<31:0>;
						}
						/* Send nop Instruction */
						exrls & (^exv | exch_vars) & ^branch : par{
							exop:=8#0b0;
							exoperand:=32#0b0;
							exoperand2:=32#0b0;
							expc:=ocdata<31:0>;
						}
					}
				}

				/* excounter=1 */
				^excounter<1> &  excounter<0> : par{
					exv=exdata1<72>;
					ocdata=exdata1;
					any {
						exrls & exv & ^branch & ^exch_vars : par{
							exdata1:=73#0b0;
							excounter:=0b10;
							exop:=ocdata<71:64>;
							exoperand:=ocdata<63:32>;
							exoperand2:=ocoperand2;
							expc:=ocdata<31:0>;
						}
						/* Send nop Instruction */
						exrls & (^exv | exch_vars) & ^branch : par{
							exop:=8#0b0;
							exoperand:=32#0b0;
							exoperand2:=32#0b0;
							expc:=ocdata<31:0>;
						}
					}
				}

				/* excounter=2 */
				 excounter<1> & ^excounter<0> : par{
					exv=exdata2<72>;
					ocdata=exdata2;
					any {
						exrls & exv & ^branch & ^exch_vars : par{
							exdata2:=73#0b0;
							excounter:=0b11;
							exop:=ocdata<71:64>;
							exoperand:=ocdata<63:32>;
							exoperand2:=ocoperand2;
							expc:=ocdata<31:0>;
						}
						/* Send nop Instruction */
						exrls & (^exv | exch_vars) & ^branch : par{
							exop:=8#0b0;
							exoperand:=32#0b0;
							exoperand2:=32#0b0;
							expc:=ocdata<31:0>;
						}
					}
				}

				/* excounter=3 */
				 excounter<1> &  excounter<0> : par{
					exv=exdata3<72>;
					ocdata=exdata3;
					any {
						exrls & exv & ^branch & ^exch_vars : par{
							exdata3:=73#0b0;
							excounter:=0b00;
							exop:=ocdata<71:64>;
							exoperand:=ocdata<63:32>;
							exoperand2:=ocoperand2;
							expc:=ocdata<31:0>;
						}
						/* Send nop Instruction */
						exrls & (^exv | exch_vars) & ^branch : par{
							exop:=8#0b0;
							exoperand:=32#0b0;
							exoperand2:=32#0b0;
							expc:=ocdata<31:0>;
						}
					}
				}
			}


			/** Operand Creation **/

			any {

				/* Branch Instructions -Create Branch Address- */

				ocifeq | ocifne | ociflt | ocifge | ocifgt | ocifle | ocif_icmpeq | ocif_icmpne | ocif_icmplt | ocif_icmpge | ocif_icmpgt | ocif_icmple | ocif_acmpeq | ocif_acmpne | ocifnull | ocifnonnull | ocgoto | ociinc : par{
					/* ocoperand2=pc+operand(16bit) */
					ocoperand2=opinc.do(0b0,ocdata<31:0>,32#ocdata<63:48>).out;
				}

				ocgoto_w : par{
					/* ocoperand2=pc+operand(32bit) */
					ocoperand2=opinc.do(0b0,ocdata<31:0>,ocdata<63:32>).out;
				}


				/* Load/Store Instructions -Create Memory Address- */

				 ociload | oclload | ocfload | ocdload | ocaload  | ocistore | oclstore | ocfstore | ocdstore | ocastore | ocret: par{
					/* ocoperand2=vars+(operand(8bit)*4) */
					ocoperand2=opinc.do(0b0,vars, 22#0b0 || ocdata<63:56> || 0b00 ).out;
				}

				 ociload_0 | oclload_0 | ocfload_0 | ocdload_0 | ocaload_0 | ocistore_0 | oclstore_0 | ocfstore_0 | ocdstore_0 | ocastore_0: par{
					/* ocoperand2=vars */
					ocoperand2=vars;
				}

				 ociload_1 | oclload_1 | ocfload_1 | ocdload_1 | ocaload_1 | ocistore_1 | oclstore_1 | ocfstore_1 | ocdstore_1 | ocastore_1: par{
					/* ocoperand2=vars+4 */
					ocoperand2=opinc.do(0b0,vars,32#0b0100).out;
				}

				 ociload_2 | oclload_2 | ocfload_2 | ocdload_2 | ocaload_2 | ocistore_2 | oclstore_2 | ocfstore_2 | ocdstore_2 | ocastore_2: par{
					/* ocoperand2=vars+8 */
					ocoperand2=opinc.do(0b0,vars,32#0b01000).out;
				}

				 ociload_3 | oclload_3 | ocfload_3 | ocdload_3 | ocaload_3 | ocistore_3 | oclstore_3 | ocfstore_3 | ocdstore_3 | ocastore_3: par{
					/* ocoperand2=vars+12 */
					ocoperand2=opinc.do(0b0,vars,32#0b01100).out;
				}

				 ocret_w : par{
					/* ocoperand2=vars+(operand(16bit)*4) */
					ocoperand2=opinc.do(0b0,vars, 14#0b0 || ocdata<63:48> || 0b00 ).out;
				}

				 ocjsr : par{
					/* ocoperand2=pc+(operand(16bit)*4) */
					ocoperand2=opinc.do(0b0,ocdata<31:0>,32#ocdata<63:48>).out;
				}

				 ocjsr_w : par{
					/* ocoperand2=pc+(operand(32bit)*4) */
					ocoperand2=opinc.do(0b0,ocdata<31:0>,ocdata<63:32>).out;
				}


				/* Another Instructions -ocoperand2=0- */

/*	other instructions will not use operand2. eliminate the else
				else : 	ocoperand2=32#0b0;
*/
			}
		}
	}/**** End of the stage OC ****/





	/********** Description of EXecution Stage **********/

	stage ex{

		state_name	exclear,ex1,ex2,ex3;
		first_state 	exclear;

		/** state exclear **/

		state exclear par{

			/* General */

			branch=0b0;
			dma=0b0;
			exrls=0b0;


			/* Exceptional */


			newpc_tmp=32#0b0;
/* ??
			scin1=32#0b0;
*/

			exop:=8#0b0;
			exoperand:=32#0b0;
			exoperand2:=32#0b0;
			expc:=32#0b0;

			goto ex1;
		}



		/** state ex1 **/

		state ex1 par{

			/* Excecution of ex1  */
  			exdecode = exdec.do(exop).out;
  			exorgop1 = exop1dec4.do(exoperand<31:28>).out;
  			exorgop2 = exop2dec4.do(exoperand<27:24>).out;
			/* Control  scinst branch dma exrls (scin0 scin1 newpc_tmp spin) */

			alt{
				/* goto & goto_w */
				exgoto | exgoto_w : par{
					exjmp();
					newpc_tmp=exoperand2;
				}
				/* ret,ret_w */
				exret | exret_w : any {
					^scma : doexret();
					else : exstall();
				}
				/* iinc (1/3) */
				exiinc : any {
					^scma : par{
						doexiinc();
					}
					else : exstall();
				}

			scv:

			any {

				/** Stack Instructions **/

				/* nop */
				exnop : exnormex();

				/* pop */
				expop :  doexpop();

				/* pop2 */
				expop2 :  doexpop2();

				/* dup */
				exdup :  doexdup();

				/* dup2 */
				exdup2 :  doexdup2();

				/* dup_x1 */
				exdup_x1 :  doexdup_x1();

				/* dup2_x1 */
				exdup2_x1 :  doexdup2_x1();

				/* dup_x2 */
				exdup_x2 :  doexdup_x2();

				/* dup2_x2 */
				exdup2_x2 :  doexdup2_x2();

				/* swap */
				exswap :  doexswap();


				/** Control Transfer Instructions **/

				/* ifeq & ifnull */
				exifeq | exifnull :  doexifeq();

				/* iflt */
				exiflt :  doexiflt();

				/* ifle */
				exifle :  doexifle();

				/* ifne & ifnonnull */
				exifne | exifnonnull:  doexifne();

				/* ifgt */
				exifgt :  doexifgt();

				/* ifge */
				exifge :  doexifge();

				/* if_icmpeq  & if_acmpeq */
				exif_icmpeq | exif_acmpeq:  doexif_icmpeq();

				/* if_icmpne & if_acmpne*/
				exif_icmpne | exif_acmpne:  doexif_icmpne();

				/* if_icmplt */
				exif_icmplt :  doexif_icmplt();

				/* if_icmpgt */
				exif_icmpgt :  doexif_icmpgt();

				/* if_icmple */
				exif_icmple :  doexif_icmple();

				/* if_icmpge */
				exif_icmpge :  doexif_icmpge();

				/* lcmp */
				exlcmp :  doexlcmp();

				/* jsr */
				exjsr :  doexjsr();

				/* jsr_w */
				exjsr_w :  doexjsr_w();

				/** Pushing Constants onto the Stack **/

				/* bipush */
				exbipush :  doexbipush();

				/* sipush */
				exsipush :  doexsipush();

				/* ldc1,2,ldc2w */

				/* iconst_m1 */
				exiconst_m1 :  doexiconst_m1();

				/* iconst_0 & aconst_null & fconst_0 */
				exiconst_0 | exaconst_null | exfconst_0:  doexiconst_0();

				/* iconst_1 */
				exiconst_1 :  doexiconst_1();

				/* iconst_2 */
				exiconst_2 :  doexiconst_2();

				/* iconst_3 */
				exiconst_3 :  doexiconst_3();

				/* iconst_4 */
				exiconst_4 :  doexiconst_4();

				/* iconst_5 */
				exiconst_5 :  doexiconst_5();

				/* lconst_0 & dconst_0 */
				exlconst_0 | exdconst_0 :  doexlconst_0();

				/* lconst_1 */
				exlconst_1 :  doexlconst_1();

				/* fconst_1 */
				exfconst_1 :  doexfconst_1();

				/* fconst_2 */
				exfconst_2 :  doexfconst_2();

				/* dconst_1 */
				exdconst_1 :  doexdconst_1();


				/** Load Local Variables onto the Stack */

				/* (i,f,a)load[_n]) */
				exload_0:  doexiload();

				/* (l,d)load[_n] (1/2) */
				exload_1: par{
						doexlload();
						goto ex2;
					}


				/** Storing Stack Value into Local Variables */

				/* (i,f,a)store[_n]) */
				exload_2:  doexistore();

				/* (l,d)store[_n] (1/2) */
				exload_3: par{
						doexlstore();
						goto ex2;
					}

				/** Arithmetic Instructions */

				/* iadd */
				exiadd :  doexiadd();

				/* ladd */
				exladd :  doexladd();

				/* fadd,dadd */

				/* isub */
				exisub :  doexisub();

				/* lsub */
				exlsub :  doexlsub();

				/* fsub,dsub,xmul,xdiv,xrem */

				/* ineg */
				exineg :  doexineg();

				/* lneg */
				exlneg :  doexlneg();

				/* fneg */
				exfneg :  doexfneg();

				/* dneg */
				exdneg :  doexdneg();


				/** Logical Instructions **/

				/* ishl */
				exishl :  doexishl();

				/* lshl */
				exlshl :  doexlshl();

				/* ishr */
				exishr :  doexishr();

				/* lshr */
				exlshr :  doexlshr();


				/* iushr */
				exiushr :  doexiushr();

				/* lushr */
				exlushr :  doexlushr();

				/* iand */
				exiand :  doexiand();

				/* land */
				exland :  doexland();

				/* ior */
				exior : doexior();

				/* lor */
				exlor :  doexlor();

				/* ixor */
				exixor :  doexixor();

				/* lxor */
				exlxor :  doexlxor();


				/** Conversion Instructions **/

				/* i2l */
				exi2l :  doexi2l();

				/* l2i */
				exl2i :  doexl2i();

				/* int2byte */
				exint2byte :  doexint2byte();

				/* int2char */
				exint2char :  doexint2char();

				/* int2short */
				exint2short :  doexint2short();



				/** Original Instructions **/

				/* ch_sp */
				exch_sp :  doexch_sp();

				/* ch_vars */
				exch_vars :  doexch_vars();

				/* ch_expt */
				exch_expt :  doexch_expt();

				/* load */
				exload :  doexload();

				/* load_w (1/2) */
				exload_w : par{
						doexload_w();
						goto ex2;
					}


			/* store */
				exstore :  doexstore();

				/* store_w (1/2) */
				exstore_w : par{
						doexstore_w();
						goto ex2;
					}

				/* push_pc */
				expush_pc :  doexpush_pc();

				/* push_sp */
				expush_sp : doexpush_sp();

				/* push_vars */
				expush_vars : doexpush_vars();

				/* push_expt */
				expush_expt :  doexpush_expt();

				/* jump */

				exjump :  doexjump();

				/* jump_sr */
				exjump_sr :  doexjump_sr();

				/* nload & nstore */
				exnldst:
					 par{
						doexnload();

						any {
							(scout1or) | ^scout1<31> : par{
								exrls=0b0;
								goto ex2;
							}
							else : exrls=0b1;
						}
					}


				/* Exceptional Instructions */

				exundef : 
					 par{
						doexexcpt();
						goto ex2;
					}
			}
			else : exstall();
			}
		}/* End of the state ex1 */




		/** state ex2 **/

		state ex2 par{

			any {
				exrls : goto ex1;
			}


			/* Excecution of ex2 */

			any {

				/** Load Local Variables onto the Stack */

				/* (l,d)load[_n] (2/2) */
				exload_1: any {
					scv : par{
						sco0i1();
						exdmaex();

						sc0:= 0b1 || mem_re(r0).dbi;
					}
					else : exstall();
				}


				/** Storing Stack Value into Local Variables */

				/* (l,d)store[_n] (2/2) */
				exload_3: any {
					scv : par{
						sco1i0();
						exdmaex();

						mem_we(r0,scout0);
					}
					else : exstall();
				}

				/* iinc (2/3) */
				exiinc : par{
					branch=0b0;
					dma=0b0;
					exrls=0b0;

					sel_op1_r0();
					sel_op2_exop();
					do_alu(0b010);
					r0:=t64<31:0>;

					goto ex3;
				}


				/** Original Instructions **/

				/* load_w (2/2) */
				exload_w : any {
					scv : par{
						sco0i1();
						exdmaex();

						sc0:= 0b1 || mem_re(r0).dbi;
					}
					else : exstall();
				}

				/* store_w (2/2) */
				exstore_w : any {
					^scma : par{
						exdmaex();

						mem_we(r0,r1);
					}
					else : exstall();
				}

				/* nload & nstore*/
				exnldst: par{
					branch=0b0;
					dma=0b0;
					exrls=0b0;

					/* r0=-=4(last) */
					sel_op1_r0();
					sel_op2_4();
					do_alu(0b010);
					r0:=t64<31:0>;

					goto ex3;
				}




				/* Exceptional Instructions */

				else : any {
					scv : par{
						sco0i1();
						exjmp();
						newpc_tmp=expt;

						sel_op1_expc();
						sel_op2_r0();
						do_alu(0b011);
						sc0:= 0b1 || t64<31:0>;
					}
					else : exstall();
				}
			}


		}/* End of the state ex2 */




		/** state ex3 **/

		state ex3 par{

			any {
				exrls : goto ex1;
			}

			/* Excecution of ex3 */

			any {

				/** Storing Stack Value into Local Variables */

				/* iinc (3/3) */
				exiinc : any {
					^scma : par{
						exdmaex();

						mem_we(exoperand2,r0);
					}
					else : exstall();
				}


				/* Original Instructions */

				/* nload */
				exnload : any {
					scv : par{
						sco0i1();
						branch=0b0;
						dma=0b1;

						/* r1+=4 */
						sel_op1_r1();
						sel_op2_4();
						do_alu(0b011);
						r1:=t64<31:0>;

						sc0:= 0b1 || mem_re(r1).dbi;

						any{
							exeqr0r1 : exrls=0b0;
							else : exrls=0b1;
						}
					}
					else : exstall();
				}

				/* nstore */
				exnstore : any {
					scv : par{
						sco1i0();
						branch=0b0;
						dma=0b1;

						/* r0-=4 */
						sel_op1_r0();
						sel_op2_4();
						do_alu(0b010);
						r0:=t64<31:0>;

						mem_we(r0,scout0);

						any{
							exeqr0r1 : exrls=0b0;
							else : exrls=0b1;
						}
					}
					else : exstall();
				}

			}

		}/* End of the state ex3 */

	}/**** End of the stage EX ****/

}/* End of the module TRAJA V2.0 */